Layout for analog/mixed-signal nanometer ICs

Layout for analog/mixed-signal nanometer ICs
by Paul McLellan on 08-26-2011 at 5:24 pm

Analog has always been difficult, a bit of a black art persuading a digital process to create well-behaved analog circuits, capacitors, resistors and all the rest. In the distant past, we would solve this by putting the analog on a separate chip, often in a non-leading-edge process. But modern SoCs integrate large amounts of digital… Read More


Intel Briefing: Tri-Gate Technology and Atom SoC

Intel Briefing: Tri-Gate Technology and Atom SoC
by Daniel Nenni on 07-17-2011 at 3:00 pm

Sorry to disappoint but my 2 hours at the Intel RNB was a very positive experience. It is much more fun writing negative things about industry leaders because I enjoy the resulting hate mail and personal attacks, but the candor and transparency of the Intel guys won me over. They even asked ME questions which was a bit telling. I also… Read More


SOC Realization

SOC Realization
by Paul McLellan on 06-27-2011 at 5:28 pm

There are some very interesting comments to the last entry on SoC Realization and how more and more chips are actually assembled out of IP. There was clearly a lot of discussion in this area at DAC, although most people (Atrenta being an exception) don’t use the term SoC Realization, presumably because it was originated by … Read More


FPGA Prototypes Made Easy

FPGA Prototypes Made Easy
by Paul McLellan on 05-23-2011 at 5:00 am

FPGA-based prototype boards are a fast, cost-effective platform for SoC system validation but they are notoriously difficult to set up and to debug. There is a big upside, however, allowing early software integration and testing and thus finding bugs in both the software and the SoC earlier. This approach is much cheaper than … Read More


SOC Realization: How Chips Are Really Designed

SOC Realization: How Chips Are Really Designed
by Paul McLellan on 05-09-2011 at 10:00 pm

If you just casually peruse most marketing presentations by EDA companies, you’d come to the conclusion most SoCs are designed from scratch, wrestlilng the monster to the ground with bare hands. But the reality is that most SoCs consist of perhaps 90% IP blocks (many of them memories). That still leaves the remaining 10% … Read More


ARM and GlobalFoundries

ARM and GlobalFoundries
by Eric Esteve on 03-25-2011 at 9:49 am


Although there has been always a strong relationship between ARM and GlobalFoundries, it is interesting to notice that Intel has helped to boost it and make it even stronger. Indeed when AMD renegotiated its x86 licensing deal with Intel in 2009, one of the most significant long-term changes was a marked reduction in how much of
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Semiconductor IP would be nothing without VIP…

Semiconductor IP would be nothing without VIP…
by Eric Esteve on 03-10-2011 at 6:35 am

…but what is the weight of the Verification IP market?

If the IP market is a niche market (see: **) with revenue of about 1% of the overall semiconductor business, how could we qualify the VIP market? Ultra-niche market? But the verification of the IP integrated into the SoC is an essential piece of the engineering puzzle when you areRead More


Clock Domain Crossing (CDC) Verification

Clock Domain Crossing (CDC) Verification
by Paul McLellan on 02-21-2011 at 6:12 pm

Multiple, independent clocks are quintessential in SoCs and other complex ASICs today. In some cases, such as in large communications processors, clock domains may number in the hundreds. Clock domain crossings pose a growing challenge to chip designers, and constitute a major source of design errors–errors that canRead More


2010 Semiconductor Foundry Update: Consolidation!

2010 Semiconductor Foundry Update: Consolidation!
by Daniel Nenni on 05-16-2010 at 6:46 pm

It has been an interesting month in the semiconductor business. Record revenues, profits, aggressive expansion plans, something we have not seen before and may not see again. Let’s start in Taiwan then move to Silicon Valley, Upstate New York, China, and Korea, with a look at: financials, capacity, and consolidation.

TSMC and… Read More