eFPGA – What’s Available Now, What’s Coming and What’s Possible!

eFPGA – What’s Available Now, What’s Coming and What’s Possible!
by Daniel Nenni on 05-20-2020 at 6:00 am

Flex Logix Inference Accelleration

eFPGA is now widely available, has been used in dozens of chips, is being designed into dozens more and it has an increasing list of benefits for a range of applications. Embedded FPGA, or eFPGA, enables your SoC to have flexibility in critical areas where algorithm, protocol or market needs are changing. FPGAs can also accelerate… Read More


TSMC stops doing business with Huawei!

TSMC stops doing business with Huawei!
by Robert Maire on 05-18-2020 at 9:30 am

China Semiconductor Ban Huawei

Hours after agreeing to build a fab in US TSMC will stop selling to Huawei- Repercussions will reverberate through all tech: Semis, semi equip, chip customers, all collateral damage.

It has been reported by Nikkei and other sources that TSMC has stopped taking orders from Huawei in order to comply with US export controls.

HUAWEIRead More


MOSFET Gate Length Scaling Limit at Reduced Threshold Voltages

MOSFET Gate Length Scaling Limit at Reduced Threshold Voltages
by Fred Chen on 05-10-2020 at 6:00 am

MOSFET Gate Length Scaling Limit at Reduced Threshold Voltages

As transistor dimensions shrink to follow Moore’s Law, the functionality of the gate used to switch on or off the current is actually being degraded by the short channel effect (SCE) [1-5]. Moreover, the simultaneous reduction of voltage aggravates the degradation, as will be discussed below.

A Practical Lower Limit ofRead More


Talking Sense With Moortec…Are You Listening?!

Talking Sense With Moortec…Are You Listening?!
by Tim Penhale-Jones on 05-04-2020 at 10:00 am

Ear no evil

It almost doesn’t matter what your job may be, whether in the public sector or a private company, or how technical or how dangerous, many of life’s adages and sayings can be interpreted to have some direct meaning for all of us.

Over the years in our personal lives, we have been constantly advised that prevention is better than cure…certainly… Read More


ASML A Scenario More Lumpy While Demand and Tech Remain Solid Despite Covid Delays

ASML A Scenario More Lumpy While Demand and Tech Remain Solid Despite Covid Delays
by Robert Maire on 04-22-2020 at 2:00 pm

ASML SemiWiki 2020

Covid issues create “lumpy” quarters due to delays
Orders & demand remain solid and strong
2020 Year financials intact so far but ignore Qtrs
Taking prudent actions- no buybacks or guidance

As expected, Covid impacts both shipments & supply chain, ignore the near term lumpiness…
ASML reported revenues… Read More


Lithography Resolution Limits – Arrayed Features

Lithography Resolution Limits – Arrayed Features
by Fred Chen on 04-17-2020 at 6:00 am

Lithography Resolution Limits Arrayed Features

State-of-the-art chips will always include some portions which are memory arrays, which also happen to be the densest portions of the chip. Arrayed features are the main targets for lithography evaluation, as the feature pitch is well-defined, and is directly linked to the cost scaling (more features per wafer) from generation… Read More


Wally Rhines: Mentoring Generations of Semiconductor and EDA Professionals

Wally Rhines: Mentoring Generations of Semiconductor and EDA Professionals
by Mike Gianfagna on 04-10-2020 at 10:00 am

Wally Then and Now

I had the good fortune to catch a live webinar recently that was quite compelling – Conversation with Dr. Walden Rhines: Predicting Semiconductor Business Trends After Moore’s Law! Dr. Rhines, known to most as Wally, doesn’t need much of an introduction. Any semiconductor or EDA professional knows who he is and what he’s accomplished.… Read More


Webinar: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs

Webinar: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs
by Herb Reiter on 04-10-2020 at 6:00 am

2d 3d Semiconductor Packaging SemiWiki Cadence

I had the opportunity to preview the upcoming SemiWiki webinar titled: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs. John Park’s message, describing this powerful Cadence solution, really impressed me. That’s why I want to encourage you to register for it and join this SemiWiki … Read More


Why I’m Lowering Semiconductor Equipment Revenue Growth to -6.9% in 2020

Why I’m Lowering Semiconductor Equipment Revenue Growth to -6.9% in 2020
by Robert Castellano on 04-09-2020 at 10:00 am

Applied Materials Lam lower C2

Because of significant $4 billion in equipment pull-ins in Q4 from sales in Asia, I was reducing my semiconductor wafer front-end (WFE) equipment revenue growth from an earlier +5% to 0% in 2020. Now, based on CORVID-19, I am further reducing revenue growth to -6.9%.

Chart 1 also shows the cyclical nature of semiconductors and semiconductor… Read More


Newsflash Chip Equip Blockade Back on!

Newsflash Chip Equip Blockade Back on!
by Robert Maire on 03-29-2020 at 2:00 pm

US China Blockade


Blocking chip sales to Huawei back on front burner
Covid19 & China Trade are equally bad
Long lived Uncertainty could “plague” industry sales going forward
Political Predictability worse than Disease Predictability

Reuters broke a story today that the proposed licensing of chip equipment to prevent “bad… Read More