Secret Sauce for Successful Mixed-signal SoCs

Secret Sauce for Successful Mixed-signal SoCs
by admin on 03-31-2015 at 12:00 pm

For a design engineer engulfed in the daily rigorous routine of having to keep in sync with updates from various design team members as well the dictums of the design management team, the task of remaining up-to-date with the design information is very often daunting.

What design changes have been checked in this week? Is the verification… Read More


The Earth is Not Flat; Neither is IP

The Earth is Not Flat; Neither is IP
by Paul McLellan on 03-29-2015 at 7:00 pm

Chip design is largely about assembling pre-designed IP, either developed in other groups in the same company, or brought in from a 3rd party, or occasionally developed within the SoC design group itself. But that makes it sound like it is a bunch of blocks linked together with some interconnect, but of course another important … Read More


25 Years of SNUG; 50 Years of Moore’s Law

25 Years of SNUG; 50 Years of Moore’s Law
by Paul McLellan on 03-26-2015 at 8:00 am

Earlier this week it was the Synopsys user group meeting SNUG. Not just any old SNUG but the 25th Annual SNUG. The first one was 15th March 1991 and was attended by 100 people. At the time, Synopsys had annual revenues of $22M. This year, the various SNUGs around the world will have a total attendance of 10,000 people and Synopsys revenue… Read More


ARM & Cadence IP Partnership for Faster SoC Design

ARM & Cadence IP Partnership for Faster SoC Design
by Eric Esteve on 03-18-2015 at 9:50 am

IP vendors always try to create differentiation, especially when designing protocol based IP. You can differentiate by building the most performing controller but you will probably miss the expectation of these customers who don’t search for performance but just compliance to a specific standard. Or the vendor may want to design… Read More


Exploring IP You Didn’t Design Yourself

Exploring IP You Didn’t Design Yourself
by Paul McLellan on 03-17-2015 at 7:00 am

Starvision Pro from Concept Engineering is a bit like one of those Leatherman multi-tools, it has a huge number of different functions, some of them fairly specialized but nonetheless incredibly useful. Many of these functions are unique to Starvision Pro, with nothing else like it on the market. Some new videos, produced by EDA… Read More


Semiconductor IP Make the World Go Round!

Semiconductor IP Make the World Go Round!
by Daniel Nenni on 11-16-2014 at 3:00 pm

Semiconductor IP really does make the life of a semiconductor professional much easier which is why Google brings us so much IP traffic. If you look at the SemiWiki analytics, IP has always been a top draw. In comparison to standard EDA traffic, IP gets about 25% more views per blog on average. Synopsys is not only the leading EDA company… Read More


Semiconductor IP Information Flow!

Semiconductor IP Information Flow!
by Daniel Nenni on 11-13-2014 at 9:00 pm

One of the biggest challenges in the IP business, or any other business for that matter, is managing the information flow. Semiconductor IP is a critical piece of the fabless semiconductor ecosystem so anybody and everybody can write about it. Unfortunately, anybody and everybody ARE writing about it. From day one IP has been a … Read More


What is up with CEVA?!?!?!

What is up with CEVA?!?!?!
by Daniel Nenni on 11-10-2014 at 7:00 pm

Semiconductor IP is definitely driving the rapid mobile expansion we are experiencing today and CEVA is a glaring example of that. Mobile design cycles are a fraction of what they used to be so who has time to create, integrate, AND validate your own IP blocks, especially at multiple foundries?


Just a little background, CEVA is really… Read More


Semiconductor IP Forecast 2014 – 2020

Semiconductor IP Forecast 2014 – 2020
by Daniel Nenni on 11-01-2014 at 10:00 pm

Given that the majority of my 30+ years in Silicon Valley has revolved around semiconductor IP it should be of no surprise that IP is a big part of SemiWiki and our first book “Fabless: The Transformation of the Semiconductor Industry”. That is also why one of my first round blogger draft choices was IP expert Dr. Eric Esteve. Eric has… Read More


Effective Bug Tracking with IP Sub-systems

Effective Bug Tracking with IP Sub-systems
by Daniel Payne on 10-31-2014 at 7:00 am

Designing an SoC sounds way more exciting than bug tracking, but let’s face it – any bug has the potential to make your silicon fail, so we need to take a serious look at the approaches to bug tracking. When using an IP or an IP subsystem in a design, the SoC integrators require some critical knowledge about this IP. The actual… Read More