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Semiconductor IP Information Flow!

Semiconductor IP Information Flow!
by Daniel Nenni on 11-13-2014 at 9:00 pm

One of the biggest challenges in the IP business, or any other business for that matter, is managing the information flow. Semiconductor IP is a critical piece of the fabless semiconductor ecosystem so anybody and everybody can write about it. Unfortunately, anybody and everybody ARE writing about it. From day one IP has been a big draw for SemiWiki and I don’t see that changing anytime soon, especially since IoT is a big IP play.

One of the more clever IP communication channels I have seen this year is Cadence Whiteboard Wednesdays. These 3-5 minute YouTube video “chalk talks” are from experts in the IP world. Luigi Turnello for example, Luigi and I worked together at Virage logic helping the foundries with SRAM implementation. Look at his credentials, look at the patents, he is the consummate IP professional, someone who I listen to and learn from whenever possible, absolutely. Here is a complete list of what has been posted this year thus far. Hopefully they will continue:

Whiteboard Wednesdays—Choosing the Right NAND Flash Solution In this week’s Whiteboard Wednesdays video, Lou Ternullo walks you through the steps to select the right NAND Flash solution and ensure it meets the requirements of your design.

Whiteboard Wednesdays – The Evolution of NAND Flash In this week’s Whiteboard Wednesdays, Lou Ternullo explains NAND Flash and the need for advanced error correction. Lou also details the Berlekamp Chaudhuri Hocquenghem (BCH) algorithm. Learn how this algorithm is implemented and how engineers are using it in their designs today.

Whiteboard Wednesdays—TripleCheck VIP In this week’s Whiteboard Wednesdays video, Moshik Ruben discusses TripleCheck verification IP (VIP) and how it allows engineers to know they have a thoroughly tested design that complies with the interface specification.

Whiteboard Wednesdays—Verification IP Productivity Tools In this week’s Whiteboard Wednesdays video, Tom Hackett talks about Cadence Verification IP (VIP) productivity tools in the VIP catalog. These tools, PureView and TripleCheck, help engineers better match their VIP to their design under test ensuring better verified designs.

Whiteboard Wednesdays—PCIe Controller Solution
In this week’s Whiteboard Wednesdays video, Sandeep Brahmadathan breaks down Cadence’s high-performance, low-latency controller solution for PCI Express (PCIe).

Whiteboard Wednesdays—Configurable 10/40G Ethernet Solution
In this week’s Whiteboard Wednesdays video, Arthur Marris discusses configurable options for Cadence 10/40G Ethernet MAC, integrated PCS, and SerDes IP.

Whiteboard Wednesdays—DDR Training Modes
In this week’s Whiteboard Wednesdays video, Jeffrey Chung discusses the various training modes within the DDR interface. Watch to learn more about how these training modes can optimize timing.

Whiteboard Wednesdays—Ethernet in Cars
In this week’s Whiteboard Wednesdays, Arthur Marris introduces the next big thing in the Ethernet space—Ethernet in cars. With its high data rate, lightweight cabling, and distributed networking capabilities, as well as the fact that it is an interoperable open standard and works well with TCP/IP, Ethernet is ideal for addressing many of the challenges facing automotive engineers.

Whiteboard Wednesdays—Selecting the Right PHY Solution
In this week’s Whiteboard Wednesdays video, Kishore Kasamsetty reviews evaluation criteria when purchasing a PHY IP solution. Kishore details topics such as power, performance, and area (PPA), interoperability, DFI, and floorplan flexibilty.

Whiteboard Wednesdays—Select the Right Performance for a 802.11ac/Advanced LTE AFE
In this week’s Whiteboard Wednesdays video, Priyank Shukla removes the mystery behind choosing the right ADC in and Analog Front End for wireless (802.11ac and/or 3G/3G) communication systems.

Whiteboard Wednesdays – Formal VIP for 100% Accurate Designs
In this week’s Whiteboard Wednesdays video, Tom Hackett discusses formal verification IP (VIP), how it supports formal analysis, and how design engineers can leverage formal VIP to ensure their designs are 100% correct.

Whiteboard Wednesdays—How to Verify SoCs Incorporating the M-PCIe Specification
In this week’s Whiteboard Wednesdays video, Mukul Dawar provides an overview of the Mobile PCIe (M-PCIe™) specification. He explains how Cadence VIP for M-PCIe can help you verify your mobile SoC design.

Whiteboard Wednesdays – USB Controller Connectivity
In this week’s Whiteboard Wednesdays, Jacek Duda continues his discussion about USB controllers. This time, the conversation focuses on High-Speed Interchip Connectivity (HSIC) and Super Speed Interchip Connectivity (SSIC) and how they improve connectivity between multiple USB applications.

Whiteboard Wednesdays – Verification Made Easy with Memory Models
In this week’s Whiteboard Wednesdays, Tom Hackett explains memory models and their role in verifying memory interfaces in today’s SoCs. He’ll explain the differences between memory models and simulation VIP, and talk about how they can help make verification a little easier.

Whiteboard Wednesdays – How to Support Higher Performance Multimedia Applications on Hosted Virtual Desktops
In this week’s Whiteboard Wednesdays, Charles Qi continues his discussion on hosted virtual desktop applications, explaining how a growing number of users are increasing the demand for higher performance multimedia and user input processing.

Whiteboard Wednesdays – Defining Different Types of USB Controllers
In this week’s Whiteboard Wednesdays, Jacek Duda takes a closer look at different types of USB controllers and their roles in today’s devices.

Whiteboard Wednesdays – Get to Know 802.11a/c Wireless Analog Front End Solution
In this week’s Whiteboard Wednesdays, Priyank Shukla discusses Cadence’s wireless analog front end (AFE) solution for 802.11a/c.

Whiteboard Wednesdays – See How Customizable Processors Can Help to Offload Your Apps Processor
In this week’s Whiteboard Wednesdays, we take a little different approach and show you a fun and fast way to understand how Cadence® Tensilica® Xtensa® processors work, and how you can easily use them to offload your applications processor.

Whiteboard Wednesdays – Verifying Solid State Drives Incorporating NVM Express
In this week’s Whiteboard Wednesdays, Mukul Dawar explains the NVM Express protocol and considerations to keep in mind when using verification IP to perform functional verification.

Whiteboard Wednesdays – Leading Up to PCI Express 4.0
In this week’s Whiteboard Wednesdays, Moshik Rubin discusses the history of the PCI Express standard. Moshik starts with PCIe Gen1, which originated in 2002, and walks through the doubling of throughput offered by each new generation, ending with PCIe Gen4.

Whiteboard Wednesdays – Using USB IP Controllers in Today’s Devices
In this week’s Whiteboard Wednesdays, Jacek Duda follows up on his earlier video focused on USB performance and now takes a closer look at USB IP controllers and their roles in today’s devices.

Whiteboard Wednesdays—Improving Power Optimization with PCI Express
In this week’s Whiteboard Wednesdays video, Arif Khan takes a closer look at PCI Express and its role in improving power optimization.

Whiteboard Wednesdays – Improving Hardware Verification with Accelerated Verification IP (VIP)
In this week’s Whiteboard Wednesdays, Tom Hackett talks about Accelerated Verification IP (VIP) and how it makes hardware verification more efficient and productive.

Whiteboard Wednesdays—Trends in the Mobile Memory World
In this week’s Whiteboard Wednesdays, Kishore Kasamsetty discusses the low-power advantage that LPDDR4 provides over the LPDDR1/2/3 in the mobile market.

Whiteboard Wednesdays – Taking Command of MIPI PHYs – M-PHY
In this week’s Whiteboard Wednesdays, the second installment of a three-party series, Kevin Yee continues his earlier discussion on “taking command” of MIPI PHYs. Here, Kevin discusses M-PHY, its architecture, and the protocol’s functionality in mobile devices.

Whiteboard Wednesdays – Promises and Challenges of DDR4 Memory Technology
In this week’s Whiteboard Wednesdays, Kishore Kasamsetty provides a history on DDR4 technology. He also walks you through the improvements of DDR4 over DDR3, as well as the memory standard’s specifications and the challenges of meeting these specifications.

Whiteboard Wednesdays – Verifying Your Designs with Simulation VIP In this week’s Whiteboard Wednesdays, Tom Hackett takes a closer look at simulation verification IP (VIP), and how these IP cores help verify designs with protocol checks, test sequences, and other capabilities.

Whiteboard Wednesdays—Wireless Transceiver Implementations
In this week’s Whiteboard Wednesdays installment, Priyank Shukla highlights wireless transceivers and protocol standards 802.11x and LTE/LTE-A. Wireless transceiver implementation options consisting of RF, Analog Front-End (AFE), and Digital components are examined.

Whiteboard Wednesdays – Taking Command of MIPI PHYs
In this week’s Whiteboard Wednesdays installment, Kevin Yee discusses what it means to “take command of MIPI PHYs”. This is a first of a three-part series on the topic. Here, Kevin will introduce you to D-PHY and its architecture, and how the protocol meets the requirements of mobile devices.

Whiteboard Wednesdays – How IP Enhances Hosted Virtual Desktops
In this week’s Whiteboard Wednesdays, Charles Qi introduces an emerging new application called Hosted Virtual Desktop, which supports increasingly mobile workers who want to use any smart, connected device to access corporate data resources. Charles goes into detail about how Cadence IP can help expand the application to help businesses make mobile workforces more efficient.

Whiteboard Wednesdays – Comparing 3D Memory Solutions and Their Market Applications
In this week’s Whiteboard Wednesdays, Scott Jacobson completes his three-part series on the Memory Wall with a discussion on the different 3D memory solutions today and their market applications. You may recall that in the first segment, Scott examined how CPU performance outstrips memory transfers, and discussed options available to system designers, such as 2D solutions.

Whiteboard Wednesdays – Understand USB Controllers and Their Performance Specs
In this week’s Whiteboard Wednesdays, Jacek Duda provides an informative overview of USB controllers and the potential performance that can be achieved. He also discusses in detail specs for USB 2.0 and USB 3.X. (Please visit the site to view this video)

Whiteboard Wednesdays—The Exploding Variety of New Interfaces for Mobile SoCs
In this week’s Whiteboard Wednesdays, Tom Hackett focuses on the wide variety of new and updated mobile interfaces for mobile SoCs. These interfaces are broken down into three catagories—SoC fabric, memory, and chip-to-chip—and include ARM AMBA 4, ARM AMBA 5, OCP, DDR, LPDDR, LPDDR3, LPDDR4, Wide I/O, Wide I/O2, DRAM, eMMC, eMMC5, UFS, CSI-3, SoundWire, USB, PCIe, and SSIC. (Please visit the site to…

Whiteboard Wednesdays – Why Cadence Verification IP (VIP) is a Smart Choice for SoCs
In this week’s Whiteboard Wednesdays episode, Tom Hackett discusses why over 500 customers consider Cadence Verification IP to be the S.M.A.R.T. choice when looking to verify their SoC designs. (Please visit the site to view this video)

Whiteboard Wednesdays – New MIPI Interfaces: Winners or Losers?
In this week’s Whiteboard Wednesdays installment, Cadence’s Moshik Ruben takes a deeper look at the MIPI protocols that are the leading choice for certain mobile interfaces. Even though MIPI protocols are a top choice, however, they are being challenged by mobile versions of PCI Express and USB. Given this landscape, what does the future look like for MIPI and its challengers? Watch this short video to find out…

Whiteboard Wednesdays—How 2D Solutions Help Close the Memory Wall Gap
In this week’s Whiteboard Wednesdays episode, Scott Jacobson deep dives into 2D memory solutions like EMMC 5.0, UFS, and DDR4. Scott highlights how these solutions can help address CPU performance and power requirements and memory ability to deliver to these needs. (Please visit the site to view this video)

Whiteboard Wednesdays – How the MIPI Alliance Works to Enhance Mobile Devices
In this week’s Whiteboard Wednesdays episode, Moshik Ruben, Product Marketing Director at Cadence, highlights the MIPI Alliance’s focus on standardization to help improve today’s mobile devices. Moshik discusses MIPI protocols including CSI-2, DSI, D-PHY, SLIMBUS, M-PHY, UniPro, UFS, CSI-3, LLI and DDRF. This year alone, these protocols are projected to be shipped in over 4 billion mobile devices.

Whiteboard Wednesdays – Implementing Always-On Audio
In this week’s Whiteboard Wednesdays episode, Gerard Andrews, from the Tensilica Audio DSP Group at Cadence, discusses always-on audio functionality. Gerard details features like voice trigger, sensor fusion, and low-power audio playback, and explains how Cadence’s HiFi DSP solution can help you successfully implement always-on audio technology in today’s mobile devices. (Please visit the site to…

Whiteboard Wednesdays – What is VIP?
Today, our continuing Whiteboard Wednesdays video blog series will provide an overview of Verification IP and how it helps test today’s complex SoCs. Watch this week’s episode to hear Tom Hackett, product marketing director at Cadence, talk about the important role that VIP plays in the verification process. Tom details how VIP provides known good designs and stress testing for all interfaces and memory…

Whiteboard Wednesdays—Imaging, Video, and Embedded Vision
Today, our continuing Whiteboard Wednesdays video blog series will shed some light and provide practical insights on imaging video. In this week’s Whiteboard Wednesdays episode, Gary Brown, from the Tensilica Imaging and Video Division at Cadence, talks about imaging, video, and embedded vision technologies that are being worked on today. Gary gives a high-level overview of the industry sectors and end products…

Whiteboard Wednesdays – Closing the Memory Wall Gap We’re excited to introduce Whiteboard Wednesdays, a new video blog series that will shed some light and provide some practical insights on how to address a variety of intellectual property (IP-) related design challenges. Our inaugural segment addresses the memory wall gap–that phenomenon that occurs when the bandwidth of microprocessors outpaces the bandwidth of the memory in the design, degrading system performance…

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