In February this year, the Department of Defense (DoD) submitted a $686.1 billions budget for 2019 and published a National Defense Strategy outlining the overall spending for defense and military programs. The recently signed US $1.3 trillion spending bill included part of the funding. According to DoD Defense Budget Overview… Read More
Tag: semiconductor design
A Delicate Choice – Emulation versus Prototyping
Hardware-assisted verification has been with us (commercially) for around 20 years and at this point is clearly mainstream. But during this evolution it split into at least two forms (emulation and prototyping), robbing us of a simple choice – to hardware-assist or not to hardware-assist (that is the question). Which in turn … Read More
CEO Interview: Jim Gobes of Intrinsix
Experience gives us the ability to make better decisions and in a fast moving industry like semiconductors, experience is critical. As chips get more integrated and complex the number of design decisions that must be made increases at a dramatic rate. Process technologies for example, never in the history of semiconductors have… Read More
Custom SoCs for IoT Revolution!
There are two interesting transformations that are currently taking place inside the semiconductor industry: First, systems companies (not chip companies) are now driving the semiconductor industry. Second, IoT focused chips are accelerating design starts. The result is what I would call the Custom SoCs for IoT Revolution!… Read More
System Implementation Connectivity Verification and Analysis, Including Advanced Package Designs
Regular Semiwiki readers are aware of the rapid emergence of various (multi-die) advanced package technologies, such as: FOWLP (e.g., Amkor’s SWIFT, TSMC’s InFO); 2D die placement on a rigid substrate (e.g., TSMC’s CoWoS); and, 2.5D “stacked die” with vertical vias (e.g., any of the High Bandwidth Memory,… Read More
CEO Interview: Vincent Markus of Menta
What is Menta all about?
Menta was founded to add hardware-programmability within SoCs. We deliver FPGAs in hard IP form that can be readily embedded within an SoC to make certain hardware functions reconfigurable at-will, post-production. This enables customers to dynamically adapt to evolving standards, perform security… Read More
Webinar: Next Generation Design Data & Release Management
Design Data Management (DDM) is a bit like insurance. It’s something every semiconductor company has to have, and as a result it’s probably something taken for granted. In order to make their products more useful, the DDM vendors have added more functionality to manage more of the lifecycle of design data.
Dassault’s Synchronicity… Read More
Circuit Design: Anticipate, Analyze, Exploit Variations – Statistical Methods and Optimization
We are happy to publish book reviews, like this one from Dr. Georges Gielen of the KU Leuven in Belgium, for the greater good of the semiconductor ecosystem. So, if you have a semiconductor book you would like to review for fame not fortune let me know.… Read More
SNUG 2017 Keynote: Aart de Geus on EDA Fusion!
I spoke with Aart before his SNUG keynote and found him to be very relaxed and upbeat about EDA and our future prospects which reminded me of my first ever (cringe-worthy) blog, “EDA is Dead”. Now, eight years later, we have what Aart calls “EDA Fusion” to thank for the reemergence of EDA as a semiconductor superpower, absolutely.… Read More
eFabless Design Challenge Results!
Will community engineering work for semiconductors? Will anyone show up? Well, the efabless design challenge is complete and the results are both interesting and encouraging, absolutely!
Efabless completed its low power voltage reference IP design challenge on Monday, March 13. This was a very interesting event that we followed… Read More
