Scaling is Failing with Moore’s Law and Dennard

Scaling is Failing with Moore’s Law and Dennard
by Dave Bursky on 05-12-2022 at 6:00 am

Scaling is Falling SemiWiki

Looking backward and forward, the white paper from Codasip “Scaling is Failing” by Roddy Urquhart provides an interesting history of processor development since the early 1970s to the present. However it doesn’t stop there and continues to extrapolate what the chip industry has in store for the rest of this decade. For the last… Read More


CEO Interviews: Dr Ali El Kaafarani of PQShield

CEO Interviews: Dr Ali El Kaafarani of PQShield
by Daniel Nenni on 05-06-2022 at 6:00 am

Dr Ali El Kaafarani Profile Picture

Dr Ali El Kaafarani is the founder and CEO of PQShield, a British cybersecurity startup specialising in quantum-secure solutions. A University of Oxford spin-out, PQShield is pioneering the commercial roll-out of a new generation of cryptography that’s fit for the quantum challenge, yet integrates with companies’ legacy

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IP Subsystems and Chiplets for Edge and AI Accelerators

IP Subsystems and Chiplets for Edge and AI Accelerators
by Daniel Payne on 05-02-2022 at 10:00 am

Scalable Chiplet Platform min

From a business viewpoint we often read in the technical press about the virtues of applying AI, and in the early days most of the AI model building was done in the cloud, because of the high computation requirements, yet there’s a developing trend now to use AI accelerators at the Edge. The other mega-trend in the past decade… Read More


Experts Talk: RISC-V CEO Calista Redmond and Maven Silicon CEO Sivakumar P R on RISC-V Open Era of Computing

Experts Talk: RISC-V CEO Calista Redmond and Maven Silicon CEO Sivakumar P R on RISC-V Open Era of Computing
by Daniel Nenni on 04-26-2022 at 10:00 am

Expert talk banner Maven Silicon

India’s top VLSI Training Services company Maven Silicon, a RISC-V Global Training Partner, conducted an insightful discussion with the industry experts Ms. Calista Redmond, CEO, RISC-V International and Mr. Sivakumar P R, CEO, Maven Silicon, on the topic “RISC-V Open Era of Computing”.

To introduce RISC-V, it is a free and … Read More


Visual Debug for Formal Verification

Visual Debug for Formal Verification
by Steve Hoover on 04-20-2022 at 6:00 am

ThisIsFormal

Success with Open-Source Formal Verification

The dream of 100% confidence is compelling for silicon engineers. We all want that big red button to push that magically finds all of our bugs for us. Verification, after all, accounts for roughly two-thirds of logic design effort. Without that button, we have to create reference models,… Read More


CEO Interview: Frankwell Lin, Chairman and CEO of Andes Technology

CEO Interview: Frankwell Lin, Chairman and CEO of Andes Technology
by Daniel Nenni on 03-11-2022 at 6:00 am

Frankwell Jyh Ming Lin

Frankwell Lin, Chairman of Andes Technology, started his career being as application engineer in United Microelectronics Corporation (UMC) while UMC was an IDM with its own chip products, he experienced engineering, product planning, sales, and marketing jobs with various product lines in UMC. In 1995, after four years working… Read More


Scalable Verification Solutions at Siemens EDA

Scalable Verification Solutions at Siemens EDA
by Daniel Nenni on 02-24-2022 at 6:00 am

Andy Meier 2

Lauro Rizzatti recently interviewed Andy Meier, product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy is a product manager in the Scalable Verification Solutions Division at Siemens EDA. Andy has held positions in the electronics and high-tech fields during his 20-year career including: Sr.Read More


Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops

Intel Embraces the RISC-V Ecosystem: Implications as the Other Shoe Drops
by Richard Wawrzyniak on 02-14-2022 at 6:00 am

Intel Foundry Ecosystem

On Monday, February 7, 2022, Intel Foundry Services (IFS), made a series of major announcements regarding the RISC-V architecture and ecosystem:

  • Intel will be joining the RISC-V International association with a Premier Membership, and Bob Brennan, Vice President of Customer Solutions Engineering for Intel Foundry Services,
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Upcoming Webinar: Optimized Chip Design with Main Processors and AI Accelerators

Upcoming Webinar: Optimized Chip Design with Main Processors and AI Accelerators
by Kalar Rajendiran on 02-08-2022 at 10:00 am

Expedera DLA IP Benefits

Using the right tool for the job can be extremely important. Well, maybe not in the case of the famed chef Martin Yan who is notorious for using just one knife—a razor sharp wide blade cleaver that doubles as a spatula—for preparing anything and everything he cooks. For the rest of us, though, the right tools can make all the difference.… Read More


DAC 2021 – What’s Up with Agnisys and Spec-driven IC Development

DAC 2021 – What’s Up with Agnisys and Spec-driven IC Development
by Daniel Payne on 01-11-2022 at 10:00 am

IDesignSpec min 1

Walking the exhibit floors at DAC in December I spotted the familiar face of Anupam  Bakshi, Founder and CEO of Agnisys, so I stopped by the booth to get an update on his EDA company. My first question for him was about the origin of the company name, Agnisys, and I found at that Agni means Fire in Sanskrit, one of the five elements.

The … Read More