TechInsights Gives Memory Update at IEDM18 NAND Flash

TechInsights Gives Memory Update at IEDM18 NAND Flash
by BHD on 04-15-2019 at 12:00 pm

On the Sunday evening at IEDM last year, TechInsights held a reception in which Arabinda Das and Jeongdong Choe gave presentations that attracted a roomful of conference attendees. Arabinda was first up, giving a talk on the “10-year Journey of Apple’s iPhone and Innovations in Semiconductor Technology”, followed by Jeongdong… Read More


Imec technology forum 2018 – the future of scaling

Imec technology forum 2018 – the future of scaling
by Scotten Jones on 06-27-2018 at 12:00 pm

At the Imec technology forum in Belgium, Dan Mocuta and Juliana Radu presented “Evolution and Disruption: A Perspective on Logic Scaling and Beyond”, I also had a chance to sit down with Dan and discuss the presentation.

Device scaling

Scaling of devices will only get you so far, you need to look at new devices and new… Read More


IEDM 2017 – Controlling Threshold Voltage with Work Function Metals

IEDM 2017 – Controlling Threshold Voltage with Work Function Metals
by Scotten Jones on 01-26-2018 at 7:00 am

As I have said many times, IEDM is one of the premier conferences for semiconductor technology. On Sunday before the formal conference started I took the “Boosting Performance, Ensuring Reliability, Managing Variation in sub-5nm CMOS” short course. The second module in the course was “Multi-Vt Engineering… Read More


IEDM Blogs – Part 6 – IMEC Technology Forum – Part 1

IEDM Blogs – Part 6 – IMEC Technology Forum – Part 1
by Scotten Jones on 01-05-2016 at 10:00 am

On Sunday evening December 6[SUP]th[/SUP] before IEDM, IMEC held the IMEC Technology Forum (ITF). The ITF was held at the Belgium ambassador’s residence, a really beautiful setting for a meeting.

The ITF began with a brief welcome by the Belgium ambassador followed by a brief introduction to IMEC. IMEC is a research institute … Read More


IEDM: FD-SOI Down to 10nm

IEDM: FD-SOI Down to 10nm
by Paul McLellan on 01-03-2015 at 1:48 pm

The big picture is that planar semiconductor transistors don’t really work below 20nm. The reason is that the gate does a poor job of controlling the channel since too much channel is too far from the gate and so there is a lot of leakage even when the transistor is nominally off. So the channel needs to be made thinner. One way … Read More


Variation: How Can We Survive?

Variation: How Can We Survive?
by Paul McLellan on 12-24-2014 at 12:57 pm

At IEDM last week Coventor hosted a panel session as they do each year. The theme this year was surviving variation. The panel was hosted by someone whose name is familiar round here, Dan Nenni. The panel that Coventor had put together had people from all sorts of different slots in the design/supply chain for semiconductor. Unfortunately… Read More


Kathryn Kranen at IEDM

Kathryn Kranen at IEDM
by Paul McLellan on 12-23-2014 at 7:00 am

It is the 50th year of IEDM, the International Electron Devices Meeting. The fact that it has been going for so long reveals why it has such an odd name: back in 1964 most “electron devices” were tubes (valves in UK lingo). This year they gave all of us a USB stick with all the papers from all 50 years of the event, something… Read More


IEDM: TSMC, Intel and IBM 14/16nm Processes

IEDM: TSMC, Intel and IBM 14/16nm Processes
by Paul McLellan on 12-16-2014 at 7:10 am

This week is IEDM. Three of the presentations today were by TSMC, Intel and IBM going over some of the details of their 14/16nm processes. They don’t provide the slides at IEDM, just the single page papers so this may end up being a somewhat random collection of facts.

TSMC were up first. They talked about the improvements that… Read More