IEDM: FD-SOI Down to 10nm

IEDM: FD-SOI Down to 10nm
by Paul McLellan on 01-03-2015 at 1:48 pm

The big picture is that planar semiconductor transistors don’t really work below 20nm. The reason is that the gate does a poor job of controlling the channel since too much channel is too far from the gate and so there is a lot of leakage even when the transistor is nominally off. So the channel needs to be made thinner. One way … Read More


Variation: How Can We Survive?

Variation: How Can We Survive?
by Paul McLellan on 12-24-2014 at 12:57 pm

At IEDM last week Coventor hosted a panel session as they do each year. The theme this year was surviving variation. The panel was hosted by someone whose name is familiar round here, Dan Nenni. The panel that Coventor had put together had people from all sorts of different slots in the design/supply chain for semiconductor. Unfortunately… Read More


Kathryn Kranen at IEDM

Kathryn Kranen at IEDM
by Paul McLellan on 12-23-2014 at 7:00 am

It is the 50th year of IEDM, the International Electron Devices Meeting. The fact that it has been going for so long reveals why it has such an odd name: back in 1964 most “electron devices” were tubes (valves in UK lingo). This year they gave all of us a USB stick with all the papers from all 50 years of the event, something… Read More


IEDM: TSMC, Intel and IBM 14/16nm Processes

IEDM: TSMC, Intel and IBM 14/16nm Processes
by Paul McLellan on 12-16-2014 at 7:10 am

This week is IEDM. Three of the presentations today were by TSMC, Intel and IBM going over some of the details of their 14/16nm processes. They don’t provide the slides at IEDM, just the single page papers so this may end up being a somewhat random collection of facts.

TSMC were up first. They talked about the improvements that… Read More


Variation at IEDM

Variation at IEDM
by Paul McLellan on 12-05-2014 at 7:01 am

IEDM (technically the International Electron Devices Meeting although I’ve never heard anyone use the full name) is in a couple of weeks time, in San Francisco. It is December 15-17th at the Hilton Union Square (which is not actually at Union Square but nearby at 333 O’Farrell Street).

For the last few years on the Tuesday… Read More


IEDM 2014 Preview

IEDM 2014 Preview
by Scotten Jones on 11-17-2014 at 8:00 pm

The International Electron Devices Meeting (IEDM) is one of the premier conferences for the presentation of the latest semiconductor processes and process technologies. IEDM is held every year in December alternating between San Francisco and Washington DC. This year IEDM will be held at the San Francisco Hilton on December… Read More


Proving the Power of Virtual Fabrication

Proving the Power of Virtual Fabrication
by Pawan Fangaria on 10-13-2014 at 7:00 am

There are many facets of our lives that are being driven to a more virtual method of doing things. This is largely due to issues such as scaling due to whatever reason – technical, business, economic. Let’s look at some general cases: In yesteryears people used to travel all the way for face-to-face meetings; today virtual meetings… Read More


Semicon Technology Advancement – A View From IEDM

Semicon Technology Advancement – A View From IEDM
by Pawan Fangaria on 12-20-2013 at 10:00 am

As I see the semiconductor industry going through significant changes and advances, yet ironically plagued by a growing perception that the pace of scaling is slowing, I was inclined to take a peek into what the industry experts say about the state of the industry and the future of Moore’s Law. Fortunately, at last week’s InternationalRead More


Please Help Me Understand IBM – Common Platform Technology Forum 2013

Please Help Me Understand IBM – Common Platform Technology Forum 2013
by Zvi on 02-08-2013 at 11:00 pm

“Innovations for Next Generation Scaling”

The 2013 Forum today (Feb 5, 2013) started with a presentation by Dr. Gary Patton, VP, IBM Semiconductor Research & Development Center. Gary very clearly articulated the two irresolvable challenges the industry now faces:

  • On chip interconnect
  • Lithography

These … Read More


Wafer Costs: Out of Control or Not?

Wafer Costs: Out of Control or Not?
by Paul McLellan on 01-01-2013 at 8:30 pm

I didn’t attend the International Electronic Device Meeting (IEDM) earlier this month, but there have been a lot of reports on the inter webs especially about 20nm and 14nm processes. Some of this is really geeky stuff but I think that perhaps the most interesting thing I’ve read about is summarized in this chart:

This… Read More