IMEC and Cadence Disclose 5nm Test Chip

IMEC and Cadence Disclose 5nm Test Chip
by Scotten Jones on 10-09-2015 at 7:00 am

Recently imec and Cadence disclosed that they had fabricated 5nm test chips. This afternoon Dan Nenni and I had a conference call with Praveen Raghavan, principal engineer at imec, and Vassilios Gerousis, distinguished engineer at Cadence to get more details on what the test chip is and what was learned.

First off Vassilios really… Read More


TCAD Enables Moore’s Law to Continue

TCAD Enables Moore’s Law to Continue
by Daniel Payne on 05-03-2015 at 7:00 am

We live in very interesting times, you can wear an Android watch from Samsung that uses 14 nm FinFET technology, attend the 52nd DAC conference in June to learn about EDA and IP vendors supporting FinFET, and read about research work for new devices down to 5 nm. TCAD is that critical software technology that enables the development… Read More


IMEC Technology Symposium

IMEC Technology Symposium
by Paul McLellan on 07-08-2014 at 12:52 pm

Yesterday I attended the IMEC Technology Forum at Semicon West. As always with IMEC, they present so much information it is like drinking from a firehose. I’ll say more about the future of process technology in a blog later this week, but this blog is about IMEC itself. It is an amazing success story. Let’s face it, if you were going … Read More