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SEMulator3D: GlobalFoundries Process Variation Reduction

SEMulator3D: GlobalFoundries Process Variation Reduction
by Paul McLellan on 08-19-2014 at 7:01 am

At SEMICON last month, Rohit Pal of GlobalFoundries gave a presentation on their methodology for reducing process variation. It was titled Cpk Based Variation Reduction: 14nm FinFET Technology.

Capability indices such as Cpk is a commonly used technique to assess the variation maturity of a technology. It looks at a given parameter’s… Read More


Intel 14nm is NOT in Production Yet!

Intel 14nm is NOT in Production Yet!
by Daniel Nenni on 08-18-2014 at 2:01 pm

Okay, maybe I’m the only one questioning Intel 14nm yield but I think it will be an interesting discussion in the comments section. Here are the questions I would have asked Intel during their recent 14nm PR tour: Has the P1272 process been rolled out to the production fabs in OR, AZ, and Ireland? Is the process officially in production… Read More


FD-SOI at 14nm

FD-SOI at 14nm
by Paul McLellan on 08-17-2014 at 7:01 am

At the recent Semicon West, Michel Haond of ST Microelectronics had a presentation on 14nm FD-SOI, or what they more lengthily call UTBB FD-SOI (which when you expand it all out comes to Ultra Thin Body and Buried-Oxide Fully Depleted Silicon on Insulator). When Chenming Hu (or whoever in his group) came up with the term FinFET it … Read More


When TSMC advocates FD-SOI…

When TSMC advocates FD-SOI…
by Eric Esteve on 08-14-2014 at 1:00 pm

I found a patent recently (May,14 2013) granted to TSMC “Planar Compatible FDSOI Design Architecture”, the following sentences, directly extracted from this patent, advertise FDSOI design better than a commercial promotion! “Devices formed on SOI substrates offer many advantages over their bulk counterparts, includingRead More


Intel Versus TSMC 14nm Processes

Intel Versus TSMC 14nm Processes
by Scotten Jones on 08-13-2014 at 5:00 pm

Intel has begun to release some details on their 14nm process. I thought it would be interesting to contrast what Intel has disclosed to TSMC’s 16nm process disclosure from last year’s IEDM (TSMC calls their 14nm process 16nm).

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Smart Meters

Smart Meters
by Paul McLellan on 08-13-2014 at 7:05 am

The Internet of Things (IoT) isn’t a single homogenous market but splits up into different segments with very different requirements. A lot of IoT markets are still in our future: next generation wearable medical devices, autonomous cars and more. One area where IoT has been going strong, long enough that it probably pre-dates… Read More


Should we pay the price of Innovation?

Should we pay the price of Innovation?
by Eric Esteve on 08-08-2014 at 8:00 pm

I agree that this question sounds stupid: nobody is forcing me to buy an innovative product, or even a gadget, if I don’t want to pay a high price, I just don’t buy the product. But it seems that some people don’t really think that way. The story is related to Qualcomm sales in China, and recently announced partnership with SMIC…

The PartnershipRead More


IBM thinks neural nets in chip with 4K cores

IBM thinks neural nets in chip with 4K cores
by Don Dingee on 08-08-2014 at 2:00 pm

Neural networks have been the darlings of researchers since the 1940s, but have eluded practical hardware implementations on all but a small scale, or an enormous one given how many processing elements and interconnects are needed. To make significant brain-like decisions, one needs at least several thousand fairly capable… Read More


Who will Manufacture Apple’s Next SoC?

Who will Manufacture Apple’s Next SoC?
by Daniel Nenni on 08-07-2014 at 8:00 pm

Just to review: The brain inside the current Apple iPhone 5s is the A7 SoC manufactured by Samsung using a 28nm process. The A6 (iPhone 5) and A5 (iPhone 4s) are based on Samsung 32nm. The rest of the Apple SoCs also used Samsung processes. I think we can all now agree that the coming Apple A8 SoC (iPhone 6) will use the TSMC 20nm process.… Read More


Hybrid Memory Cube and the Intel Knights Landing

Hybrid Memory Cube and the Intel Knights Landing
by Arie Lashansky on 08-07-2014 at 8:00 am

While looking for information on a Xilinx Spartan 6 Project with DDR memory I came across a new type of DRAM called the Hybrid Memory Cube (HMC). The technology made me want to take a closer look:

The Hybrid Memory Cube is like a stack of DDR chips stacked die on die using through silicon vias to interconnect the dies the bottom die in not… Read More