Altair SimLab: Tackling 3D IC Multiphysics Challenges for Scalable ECAD ModelingThe semiconductor industry is rapidly moving beyond traditional…Read More
AI Booming is Fueling Interface IP 23.5% YoY GrowthAI explosion is clearly driving semi-industry since 2020.…Read More
Atrenta’s SoC realization seminars, “Fast Track Your SoC Design” have started.The first one was in Ottowa last Tuesday, and it was a full house. In a straw poll, most of the attendees acknowledged facing IP handoff and quality issues. The keynote speaker was Dr Yuejian Wu, director of ASIC development at Infinera… Read More
Earlier in the week I met with Phil Bishop, who is the corporate VP of worldwide marketing at Magma.
I started by asking him where he came from. He originally started as a designer at Motorola in microprocessors and microcontrollers. Then he moved to Silicon Compiler Systems (remember them?) who ended up being acquired by Mentor.… Read More
From the President: Another Great YearThanks to innovative, cost-effective technology and excellence in customer support, we’ve just ended fiscal year 2011 (on May 31st) with solid growth. Revenue was up 8%, we added 139 new customers, and we’re continuing to reach out to technology partners for MEMS and for the analog and mixed-signal… Read More
Hardware designers use complex EDA tool flows that have collections of underlying binary and text files. Keeping track of the versions of your IC design can be a real issue when your projects use teams of engineers. ClioSoft has been offering HCM (Hardware Configuration Management) tools that work in the most popular flows of: … Read More
Almost every week I read about a slowing world economy, yet in EDA we have some bright spots to talk about, like Tanner EDA finishing its 24th year with an 8% increase in revenue. More details are in the press release from today.
I spoke with Greg Lebsack, President of Tanner EDA on Monday to ask about how they are growing. Greg has been… Read More
In working with TSMC and GlobalFoundries on AMS design reference flows I have experienced first hand the increasing verification challenges of nanometer analog, RF, and mixed-signal circuits. Tools in this area have to be both silicon accurate and blindingly fast! Berkeley Design Automation is one of the key vendors in this … Read More
“Where’s the Taurus?” In the history of company turnarounds, it was one of the most penetrating and catalyzing opening questions ever offered by a new CEO to a demoralized executive team. The CEO was Alan Mullaly, who spent years at Boeing and at one point in the 1980s studied the successful rollout of the original Ford Taurus. For… Read More
I surmised a month ago that Broadcom could be a likely acquirer of TI’s OMAP business in order to compete more effectively in Smart Phones and Tablets. I was not bold enough. Instead, Broadcom has offered $3.7B for Netlogic in order to be an even bigger player in the communications infrastructure market by picking up TCAMs and a family… Read More
There are various rumors around about Cadence starting to close up stuff that has been open for a long time. Way back in the midst of time, as part of the acquisition of CCT, the Federal Trade Commission forced Cadence to open up LEF/DEF and allow interoperability of Cadence tools (actually only place and route) I believe for 10 years.… Read More
Going up! Power and performance issues, along with manufacturing yield issues, limit how much bigger chips can get in two dimensions. That, and the fact that you can’t manufacture two different processes on the same wafer, mean that we are going up into the third dimension.
The simplest way is what is called package-in-package… Read More
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