EDA and Semiconductor companies are offering new webinars almost every week of the year, so there’s always something worth learning about that only takes an hour of time. On November 5th there’s an interesting webinar planned on the topic of IP Lifecycle Management, hosted by Methodics. I blogged two weeks ago about,… Read More
Arteris at DAC 2026 Connecting Innovation for Silicon SuccessThe semiconductor industry has entered a new era…Read More
DAC 2026 Mach42: A new generation of physics-driven AI models for analog circuit verificationMach42 spun out of the Department of Physics…Read More
Synopsys at Design Automation Conference 2026Synopsys is catalyzing the era of pervasive intelligence…Read More
DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.Accellera Systems Initiative invites the design and verification…Read More
Enabling AI to Understand Complex Runtime Behavior for Accurate, Automated Root Cause Analysis — DAC 2026Undo gives AI coding agents the runtime context…Read MoreKathryn: "Formal Will Dominate Verification"
At the Jasper Users’ Group meeting, Kathryn presented the state of Jasper. The numbers are impressive. The company has grown at a CAGR of over 35% since 2007, which is 6 times faster than EDA as a whole. They have been profitable at 15-20% EBITDA for 14 consecutive quarters.
Jasper is focused on engaging deeply with a small number… Read More
3DIC, the World Goes to…Burlingame
For the tenth year, the big 3DIC conference takes place in the Hyatt Regency at Burlingame (just south of San Francisco Airport). Officially it is 3D Architectures for Semiconductor Integration and Packaging or ASIP. This year there have already been some significant 3D announcements: TSMC’s 3D program, and Micron’s… Read More
Hierarchical Clock Domain Crossing
One of the first blogs I wrote on SemiWiki was on clock domain crossing (CDC). I thought it was rather a specialized subject, a sort of minority interest. It turned out to be one of the most-read blogs I’ve written. Modern SoCs have lots of unrelated clocks, maybe hundreds, and so ensuring that signals going from one clock domain… Read More
Qualcomm start selling DSP IP core?…
In recent times semiconductor companies have revealed their intentions to license their in-house processor architectures for the first time – IBM want to license their Power CPU architecture, nVidia to license their GPU architecture. Most recently, a rumor has surfed: Qualcomm will license their DSP architecture. We should… Read More
EM Solver and Visualization Essential for Device Design
In many designs, an on chip inductor is created as though it were simply a device with an L and a Q value. Of course this view would seem to make life simpler for designers and the tools they use. But in reality even a simple inductor is really a complex compound structure with many electromagnetic elements interacting in complex ways.… Read More
ARM Signs 48 New Licenses in Q3
ARM announced their quarterly results early this morning. ARM’s results are a funny mixture of backward looking information such as royalties which are reported a quarter late since they have to wait for their licensees to work out how many they shipped, and some very forward looking such as new licenses, which bring some… Read More
Cloud-RAN: a New Way to Build a Basestation
One thing that I learned about at the Liney Microprocessor Conference last week was C-RAN which stands for Cloud Radio Access Networks. The technology is created by ASOCS who are working with China Mobile as the driving customer. And before you dismiss that as just being one network interested in the technology, China Mobile has… Read More
The Biggest Private EDA Company
I talked this morning with fellow Brit David Halliday. More importantly, he is CEO of Silvaco, which he thinks must be the biggest private EDA company in the world. He didn’t reveal their revenue numbers but they have around 250-300 people and are profitable so you can make your own estimate.
David became CEO when Ivan Pesic,… Read More
Analog & Mixed-Signal Design Lunch & Learn
I’m a big fan of lunch and learns, mainly because I’m a big fan of lunch but I also like to learn. I’m also a big fan of Tanner EDA which is why I helped organize this event. Face to face interaction amongst the fabless semiconductor ecosystem is critical to our success so stop on by and network, lunch is on me.
Take a look at the Brief History… Read More


TSMC CoWoS versus Intel EMIB Semiconductor Packaging