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The difficulty of an engineering problem can be gauged by two things:
1) The number of attempts to generate a solution.
2) The degree of hyperbole used to describe the effectiveness of the latest solution.
The problem many folks in the EDA industry are after right now is clock domain crossings (CDCs) and the resulting metastability… Read More
Jasper’s DAC Programby Paul McLellan on 05-28-2013 at 3:52 pmCategories: EDA
Jasper’s booth is 2346 where you can see demos of the JasperGold Apps and attend seminars on the experiences of ST and Broadcom, and others:
- The Broadcom presentation on making formal an integral part of chip design is Tuesday at 10am.
- The ST presentation on adapting formal methods in ARM subsystems is Monday at 1.30pm and
…
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Barbecue at DACby Paul McLellan on 05-28-2013 at 1:55 pmCategories: EDA, Events
I already wrote about Franklin Barbecue, by some rankings the best in the whole country. If you want to go there you must be there early. They start serving at 11am and run out of food around 1pm. Closed on Monday.
But there are other barbecue and similar places near the convention center. Since I’m not an Austin native (we’ll… Read More
There’s never a dull moment in the foundry race to offer FinFET processes that enable leading-edge SoC design. Today I attended a webinar hosted by Samsung and Synopsys on how to enable 14nm FinFET design. The two speakers were Dr. Kuang-Kuo Lin from Samsung and Dr. Henry Sheng from Synopsys.
Dr. Kuang-Kuo Lin, Samsung
Dr.… Read More
This year for DAC, Calypto has assembled an impressive lineup of customer presentation, suite sessions and Designer Tracks. To start with customer presentation, Steve Kommrusch, Fellow Design Engineer from AMD will be giving a talk in the Calypto Suite on AMD’s methodology for low power and will show how AMD was able to get further… Read More
Competition in EDA is absolutely necessary in order for the fabless semiconductor ecosystem to thrive. AMS tools with a low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership. That is why Tanner EDA has shipped over 33,000 licenses of … Read More
One of the best things about being part of SemiWiki is the exposure to new technologies and the people behind them. SemiWiki now works with more than 35 companies and I get to spend time with each and every one of them. Much like I do, IROC Technologies works closely with the foundries and the top semiconductor companies so it was a pleasure… Read More
In 2002 few people outside of Steve Jobs, could have predicted the iPhone. But a forward-looking technology CEO could expect Moore’s Law to extend into portable devices as it did with PCs. While 2G and 2.5G cellular phones were shipping in the hundreds of millions, the features were rather primitive. 3G, 4G, WiFi, Bluetooth,… Read More
Recently, Forte Design Systems announced the release of a new core engine to their popular high-level synthesis tool offering. It is a large undertaking, so I asked John Sanguinetti, Forte’s CTO, to answer some questions about that development effort.
Q. How long has it been since the last major upgrade of the Cynthesizer… Read More
In advanced process technologies, electrical and timing problems due to variability can become a big issue. Due to various processing effects, a circuit performance (both speed and power) is dependent on specific layout attributes and can vary a lot from instance to instance. The accumulated effects can be severe to the point… Read More
Should Intel be Split in Half?