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Jasper’s DAC Program

Jasper’s DAC Program
by Paul McLellan on 05-28-2013 at 3:52 pm

Jasper’s booth is 2346 where you can see demos of the JasperGold Apps and attend seminars on the experiences of ST and Broadcom, and others:

  • The Broadcom presentation on making formal an integral part of chip design is Tuesday at 10am.
  • The ST presentation on adapting formal methods in ARM subsystems is Monday at 1.30pm and again on Tuesday at 4pm.
  • Security path verification is presented by Gila Logic on Monday at 11.30am and Wednesday also at 11.30am.
  • Oski Technology will present on Sequential equivalence checking on Monday at 10am and Wednesday at 1.30pm.
  • Duolog will present on a Duolog/Jasper flow with ARM on Monday at 10am and 3pm, on Tuesday at 10am and 2.30pm and on Wednesday at 10am and 3pm.

Full details on all the above presentations are here.


Also around the show are various presentations either by or about Jasper’s formal technology:

  • Designer track presentation by ST: Adopting formal methods to increase productivity and quality in verification. Wednesday 12.30pm to 1.30pm in hall 5
  • Designer track presentation by Broadcom: Formal–an integral part of chip design. Wednesday 12.30pm to 1.30pm in hall 5.
  • Tutorial: A formal approach to low power verification. Wednesday 9-11am, room 18D.
  • Teens Talk Tech, moderated by Kathryn Kranen, Wednesday 2.30pm to 3.15pm at the DAC Pavilion, booth 509.
  • Visionary talk: Views about the future of our electronic design ecosystem presented by Kathryn. Thursday 11am to 11.15am in ballroom ABC.
  • DAC Monday night party at Austin City Limits. Jasper is giving T-shirts to the first 400 people. 8pm until 1am.


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