NanoSpice Pro X Webinar SemiWiki

Driving the Future of HPC Through 224G Ethernet IP

Driving the Future of HPC Through 224G Ethernet IP
by Kalar Rajendiran on 05-23-2023 at 10:00 am

Advanced DSP Implementations

The need for speed is a never-ending story when it comes to data communications. Currently there are a number of trends such as cloud computing, artificial intelligence, Internet of Things (IoT), multimedia applications and consumer expectations driving this demand. All of these trends are accelerating the growth in high-performance-computing… Read More


A Negative Problem for Large Language Models

A Negative Problem for Large Language Models
by Bernard Murphy on 05-23-2023 at 6:00 am

Picture1

I recently read a thought-provoking article in Quanta titled Chatbots Don’t Know What Stuff Isn’t. The point of the article is that while large language models (LLMs) such as GPT, Bard and their brethren are impressively capable, they stumble on negation. An example offered in the article suggests that while a prompt, “Is it true… Read More


Why Generative AI for Chip Design is a Game Changer

Why Generative AI for Chip Design is a Game Changer
by Daniel Nenni on 05-22-2023 at 10:00 am

Efabless AI Generated Design Challenge SemiWiki 1

AI-generated chip design is progressing at an incredible pace!

Earlier this week, I wrote about the Efabless AI Generated Open–Source Silicon Design Challenge.  If you haven’t done so already, take a closer look at the challenge and see first-hand what this is all about.  In talking to Mike Wishart and Mohamed Kassem, co-founders… Read More


AMAT- Trailing Edge & China Almost Offset Floundering Foundry & Missing Memory

AMAT- Trailing Edge & China Almost Offset Floundering Foundry & Missing Memory
by Robert Maire on 05-22-2023 at 8:00 am

Amat China

-AMAT reported inline resulted helped by trailing edge & China
-Memory remains at very low levels- Foundry remains uninspiring
-China seems to be buying anything they are allowed to buy
-The recovery is too far out & unknown to handicap

Quarter was OK and Guidance also OK

Revenue was $6.63B and EPS of $1.86 versus reduced… Read More


An SDK for an Advanced AI Engine

An SDK for an Advanced AI Engine
by Bernard Murphy on 05-22-2023 at 6:00 am

Chimera SDK

I have observed before that the success of an AI engine at the edge rests heavily on the software interface to drive that technology. Networks trained in the cloud need considerable massaging to optimize for smaller and more specialized edge devices. Moreover, an AI task at the edge depends on a standalone pipeline demanding a mix… Read More


US giant swoops for British chipmaker months after Chinese sale blocked on national security grounds

US giant swoops for British chipmaker months after Chinese sale blocked on national security grounds
by Daniel Nenni on 05-21-2023 at 6:00 pm

UK US CHina Semiconductor Battle

According to UK based The Telegraph Pulsic is a chip maker and Cadence is a swooping US giant.  I guess you have to stretch the truth to get those precious clicks these days. Even so this is a strategic acquisition for Cadence.

Pulsic is a 20+ year old EDA software company that offers chip planning and implementation software for custom… Read More


Podcast EP163: The Unique Advantages of the Codasip Custom Compute Architecture With Mike Eftimakis

Podcast EP163: The Unique Advantages of the Codasip Custom Compute Architecture With Mike Eftimakis
by Daniel Nenni on 05-19-2023 at 10:10 am

Dan is joined by Mike Eftimakis. Mike has an extensive background in the electronics industry with almost 30 years in senior technical and business roles. After innovating with companies like VLSI, NewLogic or Arm, he is now VP Strategy and Ecosystem at Codasip, where he drives the long-term vision and its day-to-day implementation.… Read More


Chiplet Q&A with John Lee of Ansys

Chiplet Q&A with John Lee of Ansys
by Daniel Nenni on 05-19-2023 at 6:00 am

SNUG Panel

At the recent Synopsys Users Group Meeting (SNUG) I had the honor of leading a panel of experts on the topic of chiplets. One of those panelists was John Lee, Head of Electronics, Semiconductors and Optics at Ansys.

How is the signoff flow evolving and what is being done to help mitigate the growing signoff complexity challenge?

With… Read More


eFPGA Enabled Chiplets!

eFPGA Enabled Chiplets!
by Daniel Nenni on 05-18-2023 at 10:00 am

Achronix eFPGA IP

With our continuing chiplet coverage I found this of great interest. I have always felt that eFPGAs and chiplets are a natural fit for the next generation of chip design and this is an excellent example. As we design with chiplets one of the challenges is verification/validation in regards to performance and interoperability. … Read More


Opinions on Generative AI at CadenceLIVE

Opinions on Generative AI at CadenceLIVE
by Bernard Murphy on 05-18-2023 at 6:00 am

Generative AI

According to some AI dreamers, we’re almost there. We’ll no longer need hardware or software design experts—just someone to input basic requirements from which fully realized system technologies will drop out the other end. Expert opinions in the industry are enthusiastic but less hyperbolic. Bob O’Donnell, president, founder… Read More