There has been a lot of railing lately about how we don’t have quite the right chips for the upcoming wave of wearables. Chips one would drop in a smartphone are often overkill and overpowered, burning through electrons too quickly. Chips one would use for a simple control task generally lack peripherals and performance, offsetting… Read More
S2C Advances RISC-V Ecosystem, Accelerating Innovation at 2025 Summit ChinaShanghai, July 19, 2025 — S2C, a leader in functional…Read More
A Quick Tour Through Prompt Engineering as it Might Apply to DebugThe immediate appeal of large language models (LLMs)…Read More
What XiangShan Got Right—And What It Didn’t Dare TryAn Open ISA, a Closed Mindset — Predictive…Read More
The Critical Role of Pre-Silicon Security Verification with Secure-IC’s Laboryzr™ PlatformAs embedded systems and System-on-Chip (SoC) designs grow…Read More
Can Intel be a Leading Semiconductor Foundry?
This is the third part of a series answering the most frequently asked questions I get from Wall Street. Please read the previous two articles on Intel’s Manufacturing Lead and Intel’s SoC Challenge before flaming me in the comment section. First let’s look at why there is a foundry business and go from there.
The big… Read More
Jasper at DAC
Wait, didn’t Cadence just acquire Jasper. Why is there a Jasper at DAC post?
So the big event is lunch on Tuesday, on Treasure Island. For out of towners that is the island in the middle of the bay bridge (actually just half of it). Food trucks, awesome views of the bay, and really cool street performers. There will be street magic,… Read More
Automotive Focus @ #51DAC!
For the first time in DAC history there is an automotive track. Being a car person myself this is exciting news. I had a quick chat with Anne Cirkel, Vice Chair of DAC, and she sent me the following information to get us prepared for our week in San Francisco. The weather is going to be great so plan accordingly!
Ever increasing feature… Read More
Virtual Prototype Collaboration
The concept and use of virtual prototypes continues to grow each year in electronics design, mostly because it really does shorten product development cycles by allowing software engineers to start early debug and fix errors prior to production. Other useful benefits to virtual prototyping include software optimization, … Read More
Virtual Fabrication: Not just for fabs. Fabless companies can benefit from more visibility into process technology
Ever since I started talking about Virtual Fabrication I have mostly looked at it from the manufacturers’ perspective, where it has obvious benefits to develop and model new process technology. But what about the fabless design concept and indeed even the semiconductor IP world that has spawned from it as well? It seems that Virtual… Read More
Full-Custom Low Power Design Methodology
Digital designers have used logic optimization and logic synthesis for decades as a means to produce more optimal designs with EDA tools. On the analog and transistor-level side of design the efforts to automatically optimize for speed or power have generally been limited to circuits with only a handful of transistors. These … Read More
Atrenta @ #51DAC Must See!
Last year at DAC, we launched the RTL Signoff platform and our customers responded enthusiastically. We even had a few other EDA companies follow our lead. So what have we been up to since then?
Visit us at DAC this June and learn how we have expanded our industry leading RTL Signoff solutions to handle the next set of challenges in SoC… Read More
Intel’s SoC Challenge!
Innovation is the cornerstone of the semiconductor industry and as history has shown, the majority of semiconductor innovation has come from fabless companies. Apple computer is my favorite example since they went from selling mother boards to computer hobbyists in the 1970’s to being one of the largest and most influential … Read More
A Collaborative Approach Yields Better PI for PCBs
The power integrity (PI) of a system is an extremely important aspect to be looked at all levels – chip, package and PCB for overall reliability of the system. At the PCB level, a DC analysis, usually based on IR drop, must ensure that adequate DC voltage, satisfying all constraints of current density and temperature, is delivered… Read More
Weebit Nano Moves into the Mainstream with Customer Adoption