At advanced nodes, design rules are necessarily more complex and restrictive. Although most of the time you can find a way to live with them, sometimes it’s necessary to seek a waiver from the foundry for a particular design feature. This involves documenting the feature, the design rules in question and the conditions under which… Read More


An Affair to Remember: EDA’s 50th Anniversary
What an amazing night! I celebrated the 50[SUP]th[/SUP] anniversary of the industry I grew up in! With my beautiful wife at my side and a table full of friends we all went down memory lane, ate, drank, and then enjoyed the auction.
The tour of the new computer museum was amazing. I was learning so much up until the 1970’s, then … Read More
Tablets, smartphones & China still driving growth
Media tablets and smartphones have been the two most significant drivers of electronics and semiconductor growth for the last few years. Forecasts from two major market research firms indicate these devices will continue to be major drivers for the next few years. For 2013, Gartner and IDC (International Data Corporation) both… Read More
Webinar on IP Lifecycle Management
EDA and Semiconductor companies are offering new webinars almost every week of the year, so there’s always something worth learning about that only takes an hour of time. On November 5th there’s an interesting webinar planned on the topic of IP Lifecycle Management, hosted by Methodics. I blogged two weeks ago about,… Read More
Kathryn: "Formal Will Dominate Verification"
At the Jasper Users’ Group meeting, Kathryn presented the state of Jasper. The numbers are impressive. The company has grown at a CAGR of over 35% since 2007, which is 6 times faster than EDA as a whole. They have been profitable at 15-20% EBITDA for 14 consecutive quarters.
Jasper is focused on engaging deeply with a small number… Read More
3DIC, the World Goes to…Burlingame
For the tenth year, the big 3DIC conference takes place in the Hyatt Regency at Burlingame (just south of San Francisco Airport). Officially it is 3D Architectures for Semiconductor Integration and Packaging or ASIP. This year there have already been some significant 3D announcements: TSMC’s 3D program, and Micron’s… Read More
Hierarchical Clock Domain Crossing
One of the first blogs I wrote on SemiWiki was on clock domain crossing (CDC). I thought it was rather a specialized subject, a sort of minority interest. It turned out to be one of the most-read blogs I’ve written. Modern SoCs have lots of unrelated clocks, maybe hundreds, and so ensuring that signals going from one clock domain… Read More
Qualcomm start selling DSP IP core?…
In recent times semiconductor companies have revealed their intentions to license their in-house processor architectures for the first time – IBM want to license their Power CPU architecture, nVidia to license their GPU architecture. Most recently, a rumor has surfed: Qualcomm will license their DSP architecture. We should… Read More
EM Solver and Visualization Essential for Device Design
In many designs, an on chip inductor is created as though it were simply a device with an L and a Q value. Of course this view would seem to make life simpler for designers and the tools they use. But in reality even a simple inductor is really a complex compound structure with many electromagnetic elements interacting in complex ways.… Read More
ARM Signs 48 New Licenses in Q3
ARM announced their quarterly results early this morning. ARM’s results are a funny mixture of backward looking information such as royalties which are reported a quarter late since they have to wait for their licensees to work out how many they shipped, and some very forward looking such as new licenses, which bring some… Read More
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