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More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay

More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay
by Robert Maire on 11-15-2024 at 8:00 am

CHIPS Act Semiconductor USA

– CHIPS Act more likely to be maimed & cut than outright killed
– Will Legislators reverse flow of equipment to Reshore from Offshore?
– Recent order cuts, Fab Delay & SMIC comments are all negative
– News flow for semi equipment all bad in front of AMAT

CHIPS Act Chops likely to occur under new administration
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CEO Interview: Dr. Sakyasingha Dasgupta of EdgeCortix

CEO Interview: Dr. Sakyasingha Dasgupta of EdgeCortix
by Daniel Nenni on 11-15-2024 at 6:00 am

Sakya Dasgupta 2024

Sakya is the founder and Chief Executive officer of EdgeCortix. He is an artificial intelligence (AI) and machine learning technologist, entrepreneur, and engineer with over a decade of experience in taking cutting edge AI research from ideation stage to scalable products, across different industry verticals.  He has lead… Read More


Analog IC Migration using AI

Analog IC Migration using AI
by Daniel Payne on 11-14-2024 at 10:00 am

Analog Migration with virtuoso studio

My first job out of college was migrating a DRAM chip from one process node to a newer node, and it was a 100% manual process that required many months of effort. That need to migrate semiconductor IP to newer nodes is still with us today, and much automation has been applied to digital circuits, however migrating analog IP has proven… Read More


Next Generation of Systems Design at Siemens

Next Generation of Systems Design at Siemens
by Daniel Payne on 11-14-2024 at 8:00 am

New, Unified GUI

Electronic systems design is filled with a wide range of tools used across IC packaging design, multi-board systems, design creation, physical implementation, electro-mechanical co-design, simulation & analysis, and new product introduction. Siemens has been offering tools in this flow for many years now, so I was able… Read More


Samtec Paves the Way to Scalable Architectures at the AI Hardware & Edge AI Summit

Samtec Paves the Way to Scalable Architectures at the AI Hardware & Edge AI Summit
by Mike Gianfagna on 11-14-2024 at 6:00 am

Samtec Paves the Way to Scalable Architectures at the AI Hardware & Edge AI Summit

AI is exploding everywhere. We’ve all seen the evidence. The same thing is happening with AI conferences. The conference I will discuss here began in 2018 as the AI Hardware Summit. The initial venue was the Computer History Museum in Mountain View, CA. Like most things AI, this conference has grown substantially in a relatively… Read More


The Chips R&D Program Seeks to Accelerate Innovation

The Chips R&D Program Seeks to Accelerate Innovation
by Joseph Byrne on 11-13-2024 at 10:00 am

chips timeline

The CHIPS and Science Act has allocated $11 billion for semiconductor R&D, including for advanced packaging and AI-driven design. Companies should apply now.

In 2022, the United States signed the $50 billion Chips and Science Act. Under the act, the National Institute of Standards and Technology (NIST), which is part of … Read More


Tier1 Eye on Expanding Role in Automotive AI

Tier1 Eye on Expanding Role in Automotive AI
by Bernard Murphy on 11-13-2024 at 6:00 am

Car EE system

The unsettled realities of modern automotive markets (BEV/HEV, ADAS/AD, radical views on how to make money) don’t only affect automakers. These disruptions also ripple down the supply chain prompting a game of musical chairs, each supplier aiming to maximize their chances of still having a chair (and a bigger chair) when the … Read More


Signal Integrity Basics

Signal Integrity Basics
by Daniel Payne on 11-12-2024 at 10:00 am

Digital and analog waveforms

PCB and package designers need to be concerned with Signal Integrity (SI) issues to deliver electronic systems that work reliably in the field. EDA vendors like Siemens have helped engineers with SI analysis using a simulator called HyperLynx, dating all the way back to 1992. Siemens even wrote a 56-page e-book recently, SignalRead More


My Conversation with Infinisim – Why Good Enough Isn’t Enough

My Conversation with Infinisim – Why Good Enough Isn’t Enough
by Mike Gianfagna on 11-12-2024 at 6:00 am

My Conversation with Infinisim – Why Good Enough Isn’t Enough

My recent post on a high-profile chip performance issue got me thinking. The root cause of the problem discussed there had to do with a clock tree circuit that was particularly vulnerable to reliability aging under elevated voltage and temperature. Chip aging effects have always got my attention. I’ve lived through a few of them… Read More


Build a 100% Python-based Design environment for Large SoC Designs

Build a 100% Python-based Design environment for Large SoC Designs
by Daniel Nenni on 11-11-2024 at 10:00 am

Integrated Python based design environment

In the fast-evolving world of semiconductor design, chip designers are constantly on the lookout for EDA tools that can enhance their productivity, streamline workflows, and push the boundaries of innovation. Although Tcl is currently the most widely used language, it seems to be reaching its limits in the face of the growing… Read More