The global semiconductor market was US$82.2 billion in the second quarter of 2014 according to World Semiconductor Trade Statistics (WSTS). 2Q 2014 was up 4.8% from 1Q 2014 up 10.1% from 2Q 2013. Healthy growth should continue into 3Q 2014. The table below shows initial revenue growth guidance for 2Q 2014, final reported revenue… Read More
IP and Design Management Done Right
At DACin San Francisco this past June I was able to visit and blog about two dozen EDA companies, however there were so many more products and events to see that I couldn’t possibly have enough time to enjoy them all. Fortunately for me there were plenty of videos made of vendor presentations, so this week I got caught up a bit by… Read More
ANSYS Tools Shine at FinFET Nodes!
In the modern semiconductor ecosystem we are seeing rapid advancement in technology breaking past once perceived limits; 28nm, 20nm, 16-14nm, 10nm and we are foreseeing 7nm now. Double and multi-patterning are already being seen along with complex FinFET structures in transistors to gain the ultimate advantages in PPA from… Read More
Cortex-M7: 6-stage, cached, 400 MHz MCU
“Who needs a 32-bit MCU?” It was a question asked a million times in the press when ARM introduced the Cortex-M family back in 2004. In fairness, that question predates the Internet of Things, with wireless sensor networks, open source code, encryption, and more needs for connected devices.… Read More
Designing SmartCar ICs
When I upgraded cars from a 1988 to 1998 Acura it seemed like my car had become much smarter with a security chip in the key, security codes in the radio and a connector for computer diagnosis, however in today’s modern auto there’s a lot more mixed-signal design content. Micronasand Synopsysgot together and hosted … Read More
Who Will Lead at 10nm?
There has been a lot of discussion on SemiWiki lately around 14nm FinFET technology and who really leads and by how much. I thought it would be interesting to review some process metrics for previous technology generation and then make some forecasts around 10nm.
The focus of this article will be Intel, TSMC and Global Foundries/Samsung… Read More
Place & Route with FinFETs and Double Patterning
Place & route in the 16/14nm era requires a new approach since it is significantly more complex. Of course, every process generation is more complex than the one before and the designs are bigger. But modern processes have new problems. The two biggest changes are FinFETs and double patterning.
FinFETs, as I assume you know,… Read More
A Complete Timing Constraints Solution – Creation to Signoff
With the unprecedented increase in semiconductor design size and complexity design teams are required to accommodate multiple design constraints such as multiple power domains for low power design, multiple modes of operation, many clocks running, and third party IPs with different SDCs. As a result timing closure has become… Read More
ARM TrustZone and Zynq
Security of embedded devices is becoming more and more important. The requirement for good protection increases as devices become more interconnected: wearable medical devices that connect to the cloud, mobile base stations that are no longer up poles but in much less physically secure areas, cars that communicate among themselves.… Read More
ARM ♥ Xilinx!
The good news is that as a part of SemiWiki we get free media passes to all of the cool conferences. The bad news is that our inboxes get flooded with announcements. ARM TechCon is next week and my delete button is on overtime but it is interesting to see who is active in conferences and who is not. In this case Xilinx is very active and Altera… Read More
Real men have fabs!