In one of my whitepapers “SoCs in New Context – Look beyond PPA”, I had mentioned about several considerations which have become very important in addition to power, performance, and area (PPA) of an SoC. This whitepaper was also posted in parts as blogs on Semiwiki (links are mentioned below). Two important… Read More
Apple’s iPhone 17 Series 5G mmWave Antenna Module Revealed to be Powered by Soitec FD-SOI SubstratesRecent independent teardown and technical analyses have confirmed…Read More
Advancing Automotive Memory: Development of an 8nm 128Mb Embedded STT-MRAM with Sub-ppm Reliability IEDM 2025 Papers MRAM…Read More
AI Drives Strong Semiconductor Market in 2025-2026The global semiconductor market in 2025 was $792…Read More
How Customized Foundation IP Is Redefining Power Efficiency and Semiconductor ROIAs computing expands from data centers to edge…Read More
Akeana Partners with Axiomise for Formal Verification of Its Super-Scalar RISC-V CoresAkeana Inc. announced a key milestone in the…Read More
Get ready for hypergrade in automotive
With use cases expanding, the meaning of “automotive qualified” semiconductors is changing. What we’re now hearing about now is beyond the AEC-Q100 Grade 0 upper end of 150°C, while still meeting other reliability, retention, and security requirements. What does hypergrade mean for complex digital chip… Read More
More on the Practical Uses of Automation
There’s a good article in the March issue of the Communications of the ACM which follows a theme I commented in my “One, Two Many” post. But the CACM article has a better title: “Automation should be like Iron Man, not Ultron”.
For anyone who hasn’t seen the movies, Iron Man is a man (Tony Stark)… Read More
A Better Way for Analog Designers to Perform Variation Analysis
The impact of process variation at advanced nodes is increasing — no surprise there. In recent years, the principal design emphasis to better reflect this variation has been the adoption of two new methodologies: (1) advanced on-chip variation (AOCV, as well as POCV/LVF) for digital static timing analysis, and (2) advanced… Read More
Is Elon Musk from the Future?
One of the more annoying (ie. delightful) things about Tesla Motors is the way the company casually disrupts long established auto industry business models. Whether it is vehicle sales and service or overcoming EV range anxiety or using your car to as an extension of the power grid or letting your car drive itself.
The latest twist… Read More
Semiconductor Merger Mania Explained!
Next week is the Mentor U2U Conference in Silicon Valley. By chance I had coffee with one of the U2U keynote speakers while we were waiting for the FD-SOI Symposium to start last week and can tell you this FREE event is one you don’t want to miss:… Read More
Dr. Evil and On-Chip "LASERS" for Silicon Photonics
In the 1999 comedy, The Spy Who Shagged Me, Dr. Evil laments about why he can’t have sharks with “laser beams” attached to their heads. I get the feeling that silicon photonic designers sometimes feel the same way about why they don’t yet have integrated on-chip laser light sources. While off-chip light… Read More
Single Electron Transistors; the Single Answer?
According to a press release made last year by Gartner, “the world’s leading information technology research and advisory company,” there is projected to be nearly 21 billion internet connected devices by the year 2020 [1]. With the Internet of Things’ ever growing list of network connected devices,… Read More
Intel Dinner Keynote – IOT Solutions: System scaling during the convergence of IT and OT
The Electronic Design Processes (EDP) 2016 Workshop and Symposium, in its 23rd year, has fostered the free exchange of ideas among the top thinkers, movers, and shakers who focus on how chips and systems are designed in the electronics industry. It has provided a forum for this cross-section of the design community to discuss state-of-the-art… Read More
Debugging is the whole point of prototyping
The prototype is obviously the end goal of FPGA-based prototyping, however success of the journey relies on how quickly defects can be found and rectified. Winning in the debug phase involves a combination of methodology, capability, and planning. Synopsys recently aired a webinar on their HAPS environment and its debug ecosystem.… Read More
A Detailed History of Samsung Semiconductor