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CEO Interview with Barun Kar of Upscale AI

CEO Interview with Barun Kar of Upscale AI
by Daniel Nenni on 09-18-2025 at 10:00 am

Barun Kar Headshot

Barun Kar is CEO of Upscale AI. He is also the co-founder of Auradine and previously served as COO. Barun has over 25 years of experience leading R&D organizations to deliver disruptive products and solutions, resulting in multi-billion-dollar revenue. Barun was on the founding team at Palo Alto Networks and served as the … Read More


Eric Xu’s Keynote at Huawei Connect 2025: Redefining AI Infrastructure

Eric Xu’s Keynote at Huawei Connect 2025: Redefining AI Infrastructure
by Daniel Nenni on 09-18-2025 at 8:00 am

Eric Xu at Huawei Connect 2025

At Huawei Connect 2025, held in Shanghai, Eric Xu, the Rotating Chairman of Huawei, delivered a keynote speech that laid out the company’s ambitious roadmap for AI infrastructure, computing power, and ecosystem development. His speech reflected Huawei’s growing focus on building high-performance systems that can support… Read More


Global Semiconductor Industry Outlook 2026

Global Semiconductor Industry Outlook 2026
by Admin on 09-18-2025 at 6:00 am

Semiconductor and Beyond 2026 PWC

PwC’s comprehensive report, “Semiconductor and Beyond,” released in 2026, provides a strategic outlook on the global semiconductor industry amid rapid transformations driven by AI, geopolitical tensions, and supply chain shifts. Structured into four sections—Foreword, Demand Analysis, Supply Analysis,… Read More


SiFive Launches Second-Generation Intelligence Family of RISC-V Cores

SiFive Launches Second-Generation Intelligence Family of RISC-V Cores
by Kalar Rajendiran on 09-18-2025 at 6:00 am

SiFive 2nd Gen Intelligence Family

SiFive, founded by the original creators of the RISC-V instruction set, has become the leading independent supplier of RISC-V processor IP. More than two billion devices already incorporate SiFive designs, ranging from camera controllers and SSDs to smartphones and automotive systems. The company no longer sells its own chips,… Read More


Simulating Gate-All-Around (GAA) Devices at the Atomic Level

Simulating Gate-All-Around (GAA) Devices at the Atomic Level
by Daniel Payne on 09-17-2025 at 10:00 am

GAA FET min

Transistor fabrication has spanned the gamut from planar devices o FinFET to Gate-All-Around (GAA) as silicon dimensions have decreased in the quest for higher density, faster speeds and lower power. Process development engineers use powerful simulation tools to predict and even optimize transistor performance for GAA devices.… Read More


AI Revives Chipmaking as Tech’s Core Engine

AI Revives Chipmaking as Tech’s Core Engine
by Daniel Nenni on 09-17-2025 at 8:00 am

The Economist

A century ago, 391 San Antonio Road in Mountain View, California, housed an apricot-packing shed. Today, it’s marked by sculptures of diodes and a transistor, commemorating the 1956 founding of Shockley Semiconductor Laboratory—the birthplace of Silicon Valley. William Shockley, co-inventor of the transistor, aimed… Read More


The IO Hub: An Emerging Pattern for System Connectivity in Chiplet-Based Designs

The IO Hub: An Emerging Pattern for System Connectivity in Chiplet-Based Designs
by Bernard Murphy on 09-17-2025 at 6:00 am

Disaggregation of NoCs min

In chiplet-based design we continue the march of Moore’s Law by scaling what we can put in a semiconductor package beyond the boundaries of what we can build on a single die. This style is already gaining traction in AI applications, high performance computing, and automotive, each of which aims to scale out to highly integrated … Read More


Future Horizons Industry Update Webinar IFS 2025

Future Horizons Industry Update Webinar IFS 2025
by Daniel Nenni on 09-16-2025 at 2:00 pm

Four Horsemen of the Semiconductor Apocolypse 2025

The Future Horizons Industry Update Webinar, presented today by Malcolm Penn, provides a comprehensive analysis of the semiconductor industry’s current state and future trajectory. Founded in 1989, Future Horizons leverages over 300 man-years of experience, emphasizing impartial insights from facts (e.g., IMF … Read More


Something New in Analog Test Automation

Something New in Analog Test Automation
by Daniel Payne on 09-16-2025 at 10:00 am

IJTAG min

Digital design engineers have used DFT automation technologies like scan and ATPG for decades now, however, analog blocks embedded within SoCs have historically required that a test engineer write tests that require specialized expertise and that can take man-months to debug. Siemens has a long history in the DFT field, SPICE… Read More


MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power Efficiency

MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power Efficiency
by Daniel Nenni on 09-16-2025 at 6:00 am

2nm

MediaTek’s first chipset using 2nm technology expected in late 2026

MediaTek, a global leader in fabless semiconductor design, has announced a groundbreaking achievement in its partnership with TSMC. The company has successfully developed a flagship system-on-chip (SoC) utilizing TSMC’s cutting-edge 2nm process technology,… Read More