Semiconductor market forecasts for 2016 are all over the place. Jim Handy and Tom Starnes floated a report in January looking for 10% growth. Jim Feldhan at Semico turned outright negative at -0.3% just a couple weeks ago. Tossing out the high and low scores, analysts tracked by GSA range from 0.3% to 7.0% in March updates. What’s … Read More



Bridging Design Environments for Advanced Multi-Die Package Verification
This year is shaping up to be an inflection point, when multi-die packaging technology will experience tremendous market growth. Advanced 2.5D/3D package offerings have been available for several years, utilizing a variety of technologies to serve as the package substrate, interposer material for embedding die micro-bump… Read More
IC Design Optimization for Radiation Hardening
I was born in 1957, the same year that the Soviets launched the first satellite into Earth orbit, officially starting the Space Race between two global super powers. Today there are many countries engaged in space research and I just read about how engineers at IEAv (Institute for Advanced Studies) in Brazil did their IC design optimization… Read More
IoT Workshop in Beautiful Monterey California!
It is that time of year again, the EDPS Workshop at the Tides Hotel in Monterey. This year will start out with a keynote on IoT from Serge Leef, VP of New Ventures and GM of the System-level Engineering Division at Mentor Graphics. Serge started his career at Intel followed by Microchip and Silicon Graphics. He has been at Mentor for … Read More
Growing Security Concerns Due To Internet of Things (IoT)
It is believed that by 2020, there will be about 50 billion connected devices across the world, more than 7 times the present human population. The growth of digital devices is increasing exponentially because both users and technology are getting smarter every next day and the compatibility between the two is improving phenomenally… Read More
Improvements in SRAM Yield Variation Analysis
The design of an SRAM array requires focus on the key characteristics of readability, writeability, and read stability. As technology scaling has enabled the integration of large (cache) arrays on die, the sheer number of bitcells has necessitated a verification methodology that focuses on “statistical high-sigma” variation… Read More
Webinar: Design a LTE-based M2M Asset Tracker SoC with CEVA, using GNSS and OTDOA
If you could not attend live to the webinar from CEVA “Lear how to design a LTE-based M2M Asset Tracker SoC”, you have a second chance to access it remotely and to learn a lot. You will learn about CEVA’ Dragonfly platform 1 or 2, based on CEVA-XC8 or CEVA-XC5, and you will discover how mobile Machine 2 Machine (M2M) devices developed … Read More
TSMC and Flex Logix?
There was a lot to learn at the TSMC Technical Symposium last week, in the keynotes for sure but also in the halls and exhibits. Tom Dillinger did a nice job covering the keynotes in his posts Key Take aways from the TSMC Technology Symposium Part 1 and Part 2 but there was something interesting that many people may have missed in the exhibit… Read More
GM in the Middle of Mobility Muddle
General Motors has made a flurry of announcements around its Maven mobility brand for car sharing and its investment in Lyft. The latest news, first reported by re/code, is that Lyft and Maven will be rolling out a short-term rental program for Lyft drivers to use Chevy Equinoxes in Chicago later this month. The program is called … Read More
10nm SRAM Projections – Who will lead
At ISSCC this year Samsung published a paper entitled “A 10nm FinFET 128Mb SRAM with Assist Adjustment System for Power, Performance, and Area Optimization. In the paper Samsung disclosed a high density 6T SRAM cell size of 0.040µm[SUP]2[/SUP]. I thought it would be interesting to take a look at how this cell size stacks … Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot