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At the SPIE Advanced Lithography Conference Imec presented several design papers and I have had the opportunity to review the papers and speak with the authors. In this summary I am going to address three emerging areas in order of when I think they may be implemented from soonest to latest.
Specifically, I will discuss:
- Buried Power
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I’m a believer that connectivity for the IoT at scale (the trillions of devices that the industry predicts) has to be cellular. This is partly based on reach, particularly outside urban areas, but is mostly based on the financial implications of that scale. Yes, you can build infrastructure for say local Wi-Fi support with backhaul… Read More
Radio frequency bandwidth has become a precious commodity, with communications companies paying top dollar for prized pieces of the spectrum. However, many radio bands are not often used efficiently. Many existing radio protocols exchange data on a fixed pair of frequencies, tying up those frequencies for other users. When… Read More
2020 capex likely down at least 20% vs 2019 DRAM & NAND price drops versus slowing capacity. Investors happy cause it could have been worse.
Micron reported $1.05 in Non-GAAP EPS beating street consensus of $0.79 by $0.26. While this looks like a big beat, we would remind investors that estimates for the quarter were about… Read More
The electrostatic discharge that occurs in lightening, as seen in the picture below, can cause serious damage to the objects on the ground. Over centuries mankind has devised ways, such as lighting rods and arresters, to deflect the energy so it is dissipated harmlessly. The same drama plays out on modern semiconductors due to … Read More
If you practice in advanced levels of power management, you know about dynamic voltage and frequency scaling (DVFS). This is where you allow some part of a circuit, say a CPU, to run at different voltages and frequencies depending on acceptable performance versus thermal tradeoffs and battery life on a mobile device. Need to run… Read More
Advanced IC packaging, such as fan-out WLP (Wafer Level Packaging) and 2.5D TSV (Through Silicon Via) will drive the packaging equipment market, particularly lithography. This will help specific equipment manufacturers in 2019, since the WFE (Wafer Front End) market will drop 17%. But the Back-End lithography market, led … Read More
The “20 Questions with John East” series continues
From time to time I present the History of Silicon Valley as I saw it to various audiences. I always enjoy doing that. I’ve learned that the part that audiences like the most is the Apple / Steve Jobs story. That’s not hard to understand. Steve Jobs was truly fascinating! The story… Read More
I recently wrote about The Implications of the Rise of AI/ML in the Cloud. In that article, I wrote about my expectation that the rapidly growing AI market will lead to the accelerated use of high-level synthesis (HLS), prototyping, and emulation. In this article, I will focus on the prototyping portion of that – specifically FPGA… Read More
It was inevitable that EDA applications would meet the cloud. EDA has a long history of creating some of the most daunting compute challenges. This arises from employing current generation chips to design the next generation chips. Despite growing design complexity, many tools have kept pace and even reduced runtimes from generation… Read More
Should Intel be Split in Half?