R&D Engineer, I

Job responsibilities:

• Memory compiler block placement including power ring and interconnect routing.
• Perform several types of physical and functional verification.
  • Validation and characterization of memory designs within dedicated environments
  • Performing layout and netlist verification and tests through DRC and LVS
  • Memory compiler integration, validation and maintenance
• Generation of the complete set of release documentation
• Formal release of Memory Compilers and post release support.
• May participate in evaluation and troubleshooting of digital, analog and mixed signal circuits.

Required qualifications:

• BS/MS in Electrical Engineering or Computer Science
• Typically requires no previous professional experience, but relevant experience is a plus.
• Basic knowledge in transistor level Analog and Mixed Signal circuit design and layout
• Deep understanding of CMOS process technology
• Working knowledge of Synopsys design tools, simulators (Hspice, Finesim, Waveview, , Custom Designer)
• User level knowledge of Linux and Windows operating systems
• Working knowledge of Verilog is a plus
• Knowledge in TCL or Perl scripting language is a plus
• Good written and verbal English language skills
• Good communication skills