MtM Process integration engineer
Website TSMC
Description
1. Memory process integration
2. Technology transfer
3. Yield improvement, reliability enhancement
Qualifications
1. Mater, PhD.
2. EE, physic, chemical, material science, semiconductor related field
Apply for job
To view the job application please visit tsmc.taleo.net.



A Study of Photoresist Bake Influence on Stochastics for DUV Immersion Lithography