AI/AR ASIC Design Engineer

Design top-of-the-line Vision process/Deep learning, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.

• Work experience and rank are not limited.
• Programming skills in Verilog HDL.
• Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design implementation).
• Highly motivated and skillful at solving difficult technical problems.
• Knowledge of computing and low-power design techniques is a plus.
• Experience of Vision process design or OpenCL VX is a plus.
• Experience of CNN and deep learning design is a plus.