Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/cadence-digital-and-custom-analog-flows-certified-for-latest-intel-18a-process-technology.19668/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Cadence Digital and Custom/Analog Flows Certified for Latest Intel 18A Process Technology

AmandaK

Administrator
Staff member
21 Feb 2024

Cadence’s digital and custom/analog flows are certified on the Intel 18A process technology. Cadence® design IP supports this node from Intel Foundry, and the corresponding process design kits (PDKs) are delivered to accelerate the development of a wide variety of low-power consumer, high-performance computing (HPC), AI and mobile computing designs. Customers can now begin using the production-ready Cadence design flows and design IP to achieve design goals and speed up time to market.

“Intel Foundry is very excited to expand our partnership with Cadence to enable key markets for the leading-edge Intel 18A process technology,” said Rahul Goyal, Vice President and General Manager, Product and Design Ecosystem, Intel Foundry. “We will leverage Cadence's world-class portfolio of IP, AI design technologies, and advanced packaging solutions to enable high-volume, high-performance, and power-efficient SoCs in Intel Foundry’s most advanced process technology. Cadence is an indispensable partner supporting our IDM2.0 strategy and the Intel Foundry ecosystem.”

“The Cadence R&D team collaborated with Intel Foundry to certify its flows for the Intel 18A process and EMIB advanced packaging technology, providing best-in-class SoC and Systems-of-Chips design capabilities to enable the most advanced AI, HPC and premium mobile applications,” said Nimish Modi, Senior Vice President and General Manager of Strategy and New Ventures at Cadence. “Our customers can design with confidence, knowing that we’ve optimized our tools and IP for Intel Foundry, so they are able to extract the maximum performance per watt and meet the most challenging design requirements.”

Digital Full-Flow for Intel 18A​

The complete AI-driven Cadence RTL-to-GDS flow has been certified and optimized to work seamlessly with Intel 18A technology, allowing customers to meet power, performance and area (PPA) targets. The flow includes a range of robust solutions such as Cadence’s Genus™ Synthesis Solution, Innovus™ Implementation System, Quantus™ Extraction Solution, Quantus Field Solver, Tempus™ Timing Solution, Pegasus™ Verification System, Liberate™ characterization, and Voltus™ IC Power Integrity Solution.

Custom/Analog Flow for Intel 18A​

Cadence Virtuoso® Studio, the integrated Spectre® Platform, and the Voltus-XFi Custom Power Integrity Solution have all been certified for Intel 18A.
Virtuoso Studio is integrated with the Innovus Implementation System, enabling a complete implementation methodology of mixed-signal designs. In addition, Virtuoso Studio delivers efficient design and layout implementation on the Intel 18A process. It has many advanced integrated features including circuit and yield optimization, reliability analysis, automatic device and standard cell place-and-route (P&R), assisted device editing capabilities (including device arrays and fill), integrated EM-IR checks, integrated signoff-quality parasitic extraction and integrated signoff-quality physical verification capabilities using Virtuoso InDesign DRC.

Design IP for Intel 18A​

Cadence design IP for Intel 18A technology enables HPC and AI/ML applications, including the enterprise-class PCI Express® (PCIe®) 6.0 and Compute Express Link™ (CXL™); multi-standard PHY for LPDDR5X/5 8533Mbps to enable a diverse set of memory applications, UCIe™ to boost multi-die system in package integration and 112G extended long reach SerDes for superior bit error rate (BER) performance.

Link to Press Release
 
Back
Top