Sunnyvale, CA — August 17, 2023 — Mirabilis Design Inc, the leading provider of System-level Intellectual Property and Simulation Solutions for electronics and networks, announced today the release of VisualSim Secure Model Protector. This innovation enables all stakeholders in the product development chain of Intellectual Property Suppliers, semiconductor vendors, tier one suppliers, OEM, systems integrators and government agencies to work closely together right from the start of a new project using a uniform communication language.
With this technology, integrators no longer need to guess the performance, power and functionality of a device or IP prior to assembling the full system. They take an encrypted model of the device and plug it into their bigger model. VisualSim is a completely polymorphic port interface which means that the user does not have to worry about data structure formats or clock boundaries at the interfaces. Also, as the models can be at different levels of abstraction, the final model will be extremely fast and simulated for days of real-time. This ensures both early architecture trade-offs and rapid functional validation of the final implementation. This transforms the V-chart and connects the Digital Twin from concept to final delivery.
For example, a processor core supplier can generate models that plug into a semiconductor System-on-Chip (SoC) device, which in-turn can plug into the embedded system for infotainment or an auto gateway, which finally will go into vehicle, IoT or compute system. Designers have access to the extensive VisualSim IP library and can create models of the IP, SoC, flight systems, networks, data centers, automotive systems, vehicles, radars, communication systems and other electronics.
“Everyone in the electronics design flow, especially in aerospace and automotive, is tightly inter-connected and an incorrect specification will greatly impact product quality, safety and schedule. Having the model easily available will accelerate adoption of new technology and increase generate revenue much earlier”, said Deepak Shankar, Founder of Mirabilis Design. “Most IP and semiconductor devices take 5 years to attain critical volume. Evidence has shown a reduction in adoption time by 25-40%, if this product is adopted.”
VisualSim models are currently being shared by compute system providers, auto-gateways ECU, interface SoC, latency-sensitive software and FPGAs. The models have replaced expensive reference designs, delayed RTL models and source code for architecture analysis, testing and integration.
Mirabilis Design will be exhibiting the application of the VisualSim Secure Model Protector in semiconductor and networking applications at the following conferences.
About Mirabilis Design Inc.
Mirabilis Design is a Silicon Valley software company, providing software solutions to identify and eliminate risk in the product specification, accurately predicting the human and time resources required to develop the product, and improve communication between diverse engineering teams. VisualSim Architect combines Intellectual Property, system-level modeling, simulation, environment analysis and application templates to significantly improve model construction, simulation, analysis and RTL verification. The environment enables designers to rapidly converge to a design which meets a diverse set of interdependent time and power requirements. It is optimally used very early in the design process in parallel with (and as an aid to) the development of the product’s written specification and long before an implementation (for example, RTL, software code, or schematic) of that product can even be started.
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Trademarks
Mirabilis Design, VisualSim and Mirabilis Design logo are trademarks of Mirabilis Design Inc.
With this technology, integrators no longer need to guess the performance, power and functionality of a device or IP prior to assembling the full system. They take an encrypted model of the device and plug it into their bigger model. VisualSim is a completely polymorphic port interface which means that the user does not have to worry about data structure formats or clock boundaries at the interfaces. Also, as the models can be at different levels of abstraction, the final model will be extremely fast and simulated for days of real-time. This ensures both early architecture trade-offs and rapid functional validation of the final implementation. This transforms the V-chart and connects the Digital Twin from concept to final delivery.
For example, a processor core supplier can generate models that plug into a semiconductor System-on-Chip (SoC) device, which in-turn can plug into the embedded system for infotainment or an auto gateway, which finally will go into vehicle, IoT or compute system. Designers have access to the extensive VisualSim IP library and can create models of the IP, SoC, flight systems, networks, data centers, automotive systems, vehicles, radars, communication systems and other electronics.
“Everyone in the electronics design flow, especially in aerospace and automotive, is tightly inter-connected and an incorrect specification will greatly impact product quality, safety and schedule. Having the model easily available will accelerate adoption of new technology and increase generate revenue much earlier”, said Deepak Shankar, Founder of Mirabilis Design. “Most IP and semiconductor devices take 5 years to attain critical volume. Evidence has shown a reduction in adoption time by 25-40%, if this product is adopted.”
VisualSim models are currently being shared by compute system providers, auto-gateways ECU, interface SoC, latency-sensitive software and FPGAs. The models have replaced expensive reference designs, delayed RTL models and source code for architecture analysis, testing and integration.
Mirabilis Design will be exhibiting the application of the VisualSim Secure Model Protector in semiconductor and networking applications at the following conferences.
- - DVCon India at Bangalore in Booth 12
- - TSN/A Conference in Stuttgart in Booth 1
About Mirabilis Design Inc.
Mirabilis Design is a Silicon Valley software company, providing software solutions to identify and eliminate risk in the product specification, accurately predicting the human and time resources required to develop the product, and improve communication between diverse engineering teams. VisualSim Architect combines Intellectual Property, system-level modeling, simulation, environment analysis and application templates to significantly improve model construction, simulation, analysis and RTL verification. The environment enables designers to rapidly converge to a design which meets a diverse set of interdependent time and power requirements. It is optimally used very early in the design process in parallel with (and as an aid to) the development of the product’s written specification and long before an implementation (for example, RTL, software code, or schematic) of that product can even be started.
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Trademarks
Mirabilis Design, VisualSim and Mirabilis Design logo are trademarks of Mirabilis Design Inc.