Early and Accelerated SoC Connectivity Verification using VC Formal Connectivity Checking App

Wednesday, March 9, 2022 | 10-10:45 a.m. PST Complex bus protocols, increased on-chip functionalities, coupled with limited shared I/O resources, result in complex wiring connections in SoCs with numerous muxing schemes. Simulation and structural analysis approaches require huge effort and may lead to bug escapes making them inefficient for SoC connectivity verification. Connectivity verification using …

Webinar: Formal Validation of a Datapath Pipelined Design with VC Formal

Online

Synopsys Webinar: Wednesday, November 30, 2022 | 10:00 - 11:00 a.m. Pacific Finite Impulse Response (FIR) filters are widely used in communication, consumer electronics, and many other digital signal process (DSP) applications. A FIR filter includes a complex pipelined datapath based on arithmetic functions such as multipliers with its output at any given time depending …

Synopsys VC Formal DPV Virtual Workshop Series Day 2

Online

Day 1 (February 1, 2023) of this workshop series will cover practical knowledge of the best datapath verification strategies and provide hands-on experience with the industry's best-in-class datapath validation app – Synopsys VC Formal DPV. This workshop includes a featured session presented by Theo Drane, Datapath Architect at Intel, who will share his experience on how …

Synopsys Formal Verification SIG 2023

Synopsys Corporate Headquarters 675 Almanor Ave, Sunnyvale, CA, United States

Join us in-person on August 9th for the Synopsys Formal Verification SIG 2023 event. This event provides an opportunity for users, managers, and enthusiasts to stay connected with the latest innovations, techniques and methodologies. Attendees will hear about groundbreaking and successful applications and deployments of Synopsys VC Formal. Full agenda coming soon! REGISTER HERE