You are currently viewing SemiWiki as a guest which gives you limited access to the site. To view blog comments and experience other SemiWiki features you must be a registered member. Registration is fast, simple, and absolutely free so please, join our community today!
The Design and Verification Conference (DVCon) is the leading event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative™, DVCon brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical …
DoubleTree by Hilton Hotel San Jose
2050 Gateway Pl, San Jose, CA, United States
Accellera at DVCon US 2024 Speaker: Richard Weber, Fellow, Director of Engineering, Arteris Anupam Bakshi, CEO, Agnisys Introduction: This tutorial explains basic usage of IP-XACT IEEE 1685-2022 for IP re-use and integration flows. Summary: This workshop explains the data model underlying the IP-XACT standard. This SoC data model unifies logical and physical connectivity as well as …
