April 12, 2022 15:30 PM - 18:00 PM UTC +1 Virtual Experience Why Attend? Join us at the upcoming SPEX-I 2022 Workshops to learn about the latest features and flows to address signoff parasitic extraction challenges for advanced digital SoC designs or complex custom designs using Synopsys’ StarRC™ solution. In this workshop, we will discuss …
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Tuesday, February 21, 2023 8:00 am PT / 11:00 am ET UCIe™ — Universal Chiplet Interconnect Express™ — is an open industry standard founded by the leaders in semiconductors, packaging, IP suppliers, foundries, and cloud service providers to address customer requests for more customizable package-level integration. The newly formed UCIe Consortium fosters an open chiplet …
Performance Testing and Analysis Discuss the performance verification challenges posed by complex SoC with distributed cache from cluster, to interconnect to die-to-die. Agenda (BST) 12:00 Welcome and Introduction – Mike Bartley, Tessolve 12:00 Nick Heaton, Cadence Design Systems - SoC Verification in a Multi-chip, Multi-die world 12:30 David Kelf, Breker Verification Systems - Automated SoC Performance and …
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