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Webinar: Unlocking Next-Gen Debugging: Synopsys Verdi and Euclide IDE Integration
April 16 @ 10:00 AM - 11:00 AM
Join us for an insightful presentation into the integration of Synopsys Verdi® and Euclide IDE, revolutionizing the debugging landscape for hardware designers. In this session, we’ll delve into next-generation Verdi’s integration with Euclide IDE, a cutting-edge integrated development environment. Discover how Euclide IDE empowers designers to find bugs earlier and optimize code for design and verification flows by identifying complex design and testbench compliance checks during SystemVerilog and Universal Verification Methodology (UVM) development. Through an interactive discussion and practical demonstrations, learn how this integration streamlines debug workflow and accelerates correct-by-construction code development through context specific autocompletion and content assistance. Don’t miss this opportunity to unlock the full potential of your design process with Synopsys Verdi and Euclide IDE.
Speakers
Listed below are the industry leaders scheduled to speak.
Robert Ruiz
Product Management Director
Synopsys
Robert Ruiz is a product management director responsible for strategy and business growth of several verification products at Synopsys. Robert has held various marketing and technical positions for leading functional verification and test automation products at various companies including Synopsys, Novas Software, and Viewlogic Systems. He has more than 30 years of experience in advanced EDA technologies and methodologies and spent several years designing application-specific integrated circuits (ASICs). Robert has a BSEE degree from Stanford University.
Eldon Nelson
Staff Application Engineer
Synopsys
Eldon Nelson is a Staff Application Engineer in the Verification Group at Synopsys. He received his B.S. and M.S. degree in electrical engineering from the University of Minnesota and is a licensed Professional Engineer (P.E.). Before working at Synopsys Eldon worked for Intel, Micron Technology, IBM, Unisys, and the National Science Foundation. He has 6 published papers at DVCon and received the Best Paper Award at the conference in 2016. He held a variety of volunteer roles at IEEE and is now the Past Chair of the IEEE Twin Cities Section. He is based in Minneapolis, MN.
Next Generation of Systems Design at Siemens