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800x100 Efficient and Robust Memory Verification
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EDA Interoperability Forum

EDA Interoperability Forum
by Paul McLellan on 11-09-2011 at 3:06 pm

 The 24th Interoperability Forum is coming up at the end of the month on November 30th to be held at the Synopsys compus in Mountain View. It lasts from 9am until lunch (and yes, Virginia, there is such a thing as a free lunch). I think it looks like a very interesting way to spend a morning.

Here are the speakers and what they are speaking about:

  • Philippe Margashack, VP of central R&D at ST, will talk about 10 years of standards. Somehow I guess SystemC and TLM may figure prominently.
  • John Goodenough, VP Design technology and automation at ARM
  • Jim Hogan, long-time of Cadence and Artisan and now a private investor will talk about The sequel: a fistful of dollars (which I believe is on exit-strategies)
  • Mark Templeton (another Artisan alumnus) and now president of Scientific Ventures will talk about Survival of the fittest and the DNA of interoperability
  • Mike Keating, a Synopsys fellow and author of the Low Power Methodology Manual will talk about (surprise) Low power. Treating water in a rising flood
  • Shay Gal-On, director of software engineering at EEMBC Technology Center, will talk on Multicore Technology: To Infinity and beyond in complexity. I firmly believe that writing software for high-count multicore processors is as big a challenge as anything that we have on the semiconductor side in the coming decades.
  • Shishpal Rawat, chair of Accelera, will talk on The evolution of standards organizations: 2025 and beyond. Gulp. What technology node are we meant to be on by then?

Following the presentations there will be a wrap up, a prize drawing (let me guess, an iPad2) then lunch and networking.

I’ll see you there.

To register, go here.

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