An EDA AI Master Class by Synopsys CEO Aart de Geus

I consider Dr. Aart de Geus one of the founding fathers of EDA and one of the most interesting people in the semiconductor industry. So it is not a surprise that Aart was chosen to attend the CHIPs Act signing at the White House.

Here is his current corporate bio:

Since co-founding Synopsys in 1986, Dr. Aart de Geus has expanded Synopsys from a start-up synthesis company to a global high-tech leader. He has long been considered one of the world’s leading experts on logic synthesis and simulation, and frequently keynotes major conferences in electronics and design automation. Dr. de Geus has been widely recognized for his technical, business, and community achievements with multiple awards including Electronic Business Magazine’s “CEO of the Year,” the IEEE Robert N. Noyce Medal, the GSA Morris Chang Exemplary Leadership Award, the Silicon Valley Engineering Council Hall of Fame Award, and the SVLG Lifetime Achievement Award. He serves on the Boards of the Silicon Valley Leadership Group, Applied Materials, the Global Semiconductor Alliance, and the Electronic System Design Alliance.

You should know that Aart is also an accomplished musician and one of the driving forces behind the band Legally Blue which my beautiful wife and I follow.

As an avid reader of the earning call transcripts for leading companies inside the semiconductor ecosystem, this quarter’s SNPS call simply stands out as one of the best I have read in some time.

Synopsys, Inc. (SNPS) CEO Aart de Geus on Q3 2022 Results – Earnings Call Transcript

You should read the whole thing but here are some intriguing AI snippets:

Aart de Geus
Leading the way is our award-winning DSO.ai artificial intelligence design solution, which is revolutionizing chip design. First to market over two years ago with technology that is still unmatched today, it delivers outstanding productivity improvements that are already driving substantial increases in customer commitments.

DSO.ai is also driving very significant low-power improvements exemplified by a large automotive chip maker, achieving a 30% power reduction. These compelling outcomes are driving a high pace of adoption for production tape-outs across verticals and a broad set of process nodes.

Daniel Nenni
As I have mentioned before AI is the #1 driver for the semiconductor industry and that now includes EDA. Not only will most every chip be touched by AI, the entire semiconductor ecosystem will be fueled by it. The AI talk continued in the Q&A:

Jason Celino
So Aart, the references for DSO.ai, the customer wins, they’re quite impressive. How are customers using DSO.ai today, is it more proof-of-concept type work? Is it leading edge type work? And then are these customers evaluating Cadence Cerebrus simultaneously?

Aart de Geus
Well, the reason I mentioned that it has impact on our business is because they’re using this in production. And yes, of course, the most advanced people have always been the people that first pick up on the most capable new tools. And so, these are very advanced often large companies that are doing now many designs with this capability because the value it’s high, and they are definitely seeing the issue of insufficient talent. And so that’s sort of the main space.

I don’t know actually that we see much of our competition, not to put them down or anything like that. I’m sure they’re doing good stuff. But the advances that we’ve made in the last year, even in my own book, are quite remarkable and are broadening, by the way, to more and more capabilities going forward.

So I think we’re into a whole next phase of what EDA will mean to our customers. And very often, advanced users try very quickly and then they’re very careful. They tried very quickly, and they’re absolutely adopting.

Jay Vleeschhouwer
Aart, a technology question for you. So, on subject of AI, two things. First, could you talk about how you do your own internal development for AI? That is for DSO.ai. The reason I ask is, as I’m sure you’re well aware, there’s an arms race across multiple software company, each claiming to have some AI.

And obviously, you do. It’s in production. But I’m curious as to how you distinguish or carve out your own internal AI, specifically for EDA purposes, as compared to the developments you do for the tools themselves. And then more broadly, how do you think about the implications of AI for the IP business? The reason I asked that is Synopsys and a recent technology presentation at — actually an ANSYS Conference spoke about, for example, AI in the context of design reuse, design remastering, all of which would seem to have some implication for IT and which, of course, you’re number one, at least in EDA.

Aart de Geus
Okay. Let me start with AI. The first thing to understand with AI is AI is a very advanced, different way of programming the solution to a variety of problems. And of course, we use the traditional approach, but we also use what’s called pattern matching where you find situations — where the recognition of the situation allows you to improve something for the better. Now that statement applies to the domain that you apply it to.

And so if we took our DSO.ai and say, “Hey, tomorrow morning, we’re going to do, I don’t know, blood diagnostics and learn something about patients,” we would have initially 0 to offer because the AI needs to be matched in its intent to the area of the problem.

And by the way, I — in fact you alluded to that a minute ago on the question of why the AI chips, all these people are essentially optimizing for their domain, right? Well, we have optimized for our domain, and our domain is unbelievably complex because we have, arguably, some of the most complex search spaces, meaning those are all the potential solutions finding the right one in any field. And so it’s really the combination of the understanding of what we do and then the exploration with AI that fits together.

Secondly, AI for IP, of course, we use it ourselves. And a very simple reason would be one could consider Synopsys as one of the most advanced design companies in the world for what we do. And so, we don’t use our designs to put chips on the markets. We don’t design chips. We design IP blocks. But the concept is actually similar.

Third, you mentioned something interesting that I’m well familiar with, which is the need and the desire to sometimes take an existing design and migrate it to a different technology node. Sometimes it’s called remastering. Sometimes it’s called retargeting. That’s the word you used, I think. And initially, we did some experiments already a year ago for knowing — going from one node to another node that was pretty similar.

And we’ve got excellent results, and we’ve got them fast. And we could learn from the existing design and apply it to the new one. Meanwhile, we’ve vastly improved on that because we’ve been able to move many clicks forward in terms of nodal technology and still get much better results. And so I’m the first one to say we’re at the beginning of a big journey. But so far, it’s a pretty cool journey.

Daniel Nenni
The other notable in the call is that Synopsys will break the $5B revenue mark this year which in itself is historic for EDA. If you every get a chance to see or hear Aart speak I would strongly suggest you do. In fact, he will speak at the GSA Executive Forum on September 27^th. I hope to see you there.

Also read:

WEBINAR: Design and Verify State-of-the-Art RFICs using Synopsys / Ansys Custom Design Flow

DSP IP for High Performance Sensor Fusion on an Embedded Budget

Intelligently Optimizing Constrained Random

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