SNPS1301149083 snug sv 2024 semiwiki 400x400 px v2
WP_Term Object
    [term_id] => 50
    [name] => Events
    [slug] => events
    [term_group] => 0
    [term_taxonomy_id] => 50
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 1209
    [filter] => raw
    [cat_ID] => 50
    [category_count] => 1209
    [category_description] => 
    [cat_name] => Events
    [category_nicename] => events
    [category_parent] => 0

Upcoming Virtual Event: Designing a Time Interleaved ADC for 5G V2X Automotive Applications

Upcoming Virtual Event: Designing a Time Interleaved ADC for 5G V2X Automotive Applications
by Kalar Rajendiran on 08-03-2021 at 10:00 am

Over the last decade or so, the automotive industry has been rapidly adopting and deploying innovative and revolutionary technologies in automobiles. One such revolution is the autonomous vehicle technology. While this technology is not fully mature yet, some components of this technology are. Many late model automobiles already offer Advanced Driver Assist Systems (ADAS) which enhance the safety of drivers and vehicles. ADAS use information that they gather from sensors such as radar and cameras mounted in the vehicles. After processing the information, they provide actionable guidance to the driver or take automatic action to prevent accidents.

While ADAS is a revolutionary first step in the pursuit of automobile road safety, a key missing piece for achieving fully autonomous vehicles is the lack of a communications system to interconnect vehicles and traffic system infrastructure. The industry has been working on such a vehicular communication system and has named it Vehicle to Everything (V2X). The primary purpose of a V2X system is to improve road safety, enhance road traffic efficiency and bring energy savings to automobiles.

A complete V2X communication system has four aspects to it, namely, vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P) and vehicle-to-network (V2N) communications. Such as system may be called a fully connected system, with vehicles being able to communicate with other vehicles, traffic system infrastructure, pedestrians and the cloud data centers. Currently, there are a couple of competing standards under consideration for implementing a V2X system. Whether it is the IEEE 802.11p or the Cellular V2X standard, the implementation will operate in the analog/mixed-signal domain.

A V2X system will rely on the speed, precision, accuracy and reliability of the integrated circuits (ICs) used to implement that system. As a result, IC designers must ensure that their designs are fail-operational, have low defect rates, and operate reliably over a long period of time.

With the above objective, Synopsys and Global Foundries are jointly sponsoring a virtual event to promote state-of-the-art analog design practices for automotive circuits. It’s a 2-day educational virtual event that will be led by two engineering professors from Wayne State University and is scheduled for Aug 30 and Aug 31, 2021.

Mohammed Ismail Wayne State University adc

Mohammed Ismail, Chair & Professor, Electrical and Computer Engineering, Wayne State University


Mohammad Alhawari Wayne State University ADC webinar

Mohammad Alhawari, Assistant Professor, Electrical and Computer Engineering, Wayne State University


About the Event

The virtual event is structured as a lecture and lab program. It is not a tools training or marketing presentation. The first day will begin with introductions to 5G in automotive applications, Global Foundries’ 22nm FDSOI technology and Time-Interleaved SAR ADCs for multiband V2X applications. The professors will then lead participants through designing and verifying a state-of-the-art 5G V2X design using the 22nm FDSOI process technology.

Why Attend?

    • Learn about the design and verification of an ADC for 5G V2X (Vehicle-to-everything) application, using the Global Foundries (GF) 22 nm FDSOI technology
    • Participate in hands-on lab sessions to learn about specific challenges related to ADC design

– designing the track-and-hold and comparator circuits

– handling effects of timing skew on Time-Interleaved (TI) ADCs

– accounting for effects of post-layout parasitics as well as aging and statistical variation

Who Should Attend?

This virtual experience is designed for:

    • Analog Design Engineers
    • Academic Luminaries
    • University Students

Registration Link: You can register for the virtual event here.

Also Read:

Optimize RTL and Software with Fast Power Verification Results for Billion-Gate Designs

Driving PPA Optimization Across the Cubic Space of 3D IC Silicon Stacks

Die-to-Die Connections Crucial for SOCs built with Chiplets

Share this post via:


There are no comments yet.

You must register or log in to view/post comments.