CEVA Dolphin Weninar SemiWiki 800x100 260419 (1)
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 4454
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 4454
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
    [is_post] => 
)
EDA

Electronic Design Automation

Posted on

Mentor and ASSET Intertech Do a DFT World Tour

Mentor and ASSET Intertech Do a DFT World Tour
by Beth Martin on 02-19-2015 at 1:01 pm
Categories: EDA, Siemens EDA, Uncategorized

The Mentor Graphics test folks and ASSET Intertech have teamed up to provide a series of free DFT seminars in the US, Europe, and Asia. The first one is in Austin, TX on February 19, 2015, and the last is in Tokyo on April 24. Hereis the full list of locations and dates.

The morning session covers IJTAG. The new IEEE 1687 Internal JTAG (IJTAG)… Read More

Posted on

Mentor shows post-PC industrial device approach

Mentor shows post-PC industrial device approach
by Don Dingee on 02-18-2015 at 9:00 pm
Categories: EDA

The term “human machine interface” originated from the factory floor. In the context of HMI, machine refers not to the computer, but to a machine tool or other instrument the computer was attached to. For decades, if an HMI was needed, it was implemented on a PC or single-board computer running Microsoft Windows. Real-time processing… Read More

Posted on

MEMS Require 3D Field Solver for Accurate Cap Values

MEMS Require 3D Field Solver for Accurate Cap Values
by Tom Simon on 02-18-2015 at 9:00 am
Categories: EDA, Siemens EDA

MEMS devices have become extremely important and common. Freescale last year reported its combined MEMS shipments exceeded 2 billion units. If we just examine how many accelerometers we each probably own today, it is easy to see why the market for these products is growing so rapidly. The first and most obvious device is our cell… Read More

Posted on

Physically Aware DFT Improves PPA

Physically Aware DFT Improves PPA
by Pawan Fangaria on 02-16-2015 at 7:00 pm
Categories: Cadence, EDA

Introducing on-chip test circuitry has become a necessary criteria for an ASIC’s post manufacture testability. The test circuitry is usually referred as DFT (Design-for-Test) circuit. A typical methodology for introducing DFT circuit in a design is to replace usual flip-flops with special types of flip-flops called ‘scan… Read More

Posted on

Secure Processor for IoT

Secure Processor for IoT
by barun on 02-16-2015 at 1:00 pm
Categories: EDA, IoT

In my last blog “Processor for IoT” I have discussed security as one of the key requirements for processor used in IoT devices. In this blog we will analyze different method of hacking and some techniques which can be used to prevent those security breaches.

One of the common ways of attack is to probe address and data … Read More

Posted on

Do You Need a Silicon Catalyst?

Do You Need a Silicon Catalyst?
by Daniel Nenni on 02-14-2015 at 7:00 pm
Categories: EDA, Foundries, IP, Synopsys, TSMC

Lately there has been significant concern over the rising costs of designing in silicon and the troubling decline in venture investments in semiconductors. These alarming trends include fewer IPOs, a falloff in the amount and frequency of early stage seed investments, and comparatively low industry organic growth rates. A … Read More

Posted on

More Test Points are Better

More Test Points are Better
by Daniel Payne on 02-14-2015 at 7:00 am
Categories: EDA

I got really involved in testability back at CrossCheck in the 1990’s when they designed a way for Gate Arrays to have 100% observability without any Design For Test (DFT) requirements on designers. The Japanese Gate Array companies loved this approach and their customers enjoyed the highest test coverage without being… Read More

Posted on

A Comprehensive Automated Assertion Based Verification

A Comprehensive Automated Assertion Based Verification
by Pawan Fangaria on 02-13-2015 at 4:00 pm
Categories: EDA

Using an assertion is a sure shot method to detect an error at its source, which may be buried deep within a design. It does not depend on a test bench or checker, and can fire automatically as soon as a violation occurs. However, writing assertions manually is very difficult and time consuming. To do so require deep design and coding… Read More

Posted on

Dealing with FPGA IP in all its forms

Dealing with FPGA IP in all its forms
by Don Dingee on 02-12-2015 at 10:00 pm
Categories: EDA, FPGA, Synopsys

One of the recurring themes I see here in the pages of SemiWiki and elsewhere is this pitched, bordering on religious battle between Altera and Xilinx. Just because both are FPGA technologies, the tendency is to put them in the same bucket, drawing direct comparisons between them. Some folks say there is no comparison; Xilinx has… Read More

Posted on

ADAS Going Mainstream One Chip at a Time

ADAS Going Mainstream One Chip at a Time
by Majeed Ahmad on 02-12-2015 at 1:00 pm
Categories: EDA, IoT, STMicroelectronics

Advanced Driving Assistance Systems (ADAS) are an essential element in the vision of autonomous or semi-autonomous vehicles, and they are becoming available today. The ADAS automotive technology raises driving safety by detecting obstacles around the vehicle such as other vehicles and pedestrians, as well as traffic signs… Read More