WP_Term Object
(
    [term_id] => 101
    [name] => Empyrean
    [slug] => empyrean
    [term_group] => 0
    [term_taxonomy_id] => 101
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 20
    [filter] => raw
    [cat_ID] => 101
    [category_count] => 20
    [category_description] => 
    [cat_name] => Empyrean
    [category_nicename] => empyrean
    [category_parent] => 157
)
            
Empyrean Logo SemiWiki
WP_Term Object
(
    [term_id] => 101
    [name] => Empyrean
    [slug] => empyrean
    [term_group] => 0
    [term_taxonomy_id] => 101
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 20
    [filter] => raw
    [cat_ID] => 101
    [category_count] => 20
    [category_description] => 
    [cat_name] => Empyrean
    [category_nicename] => empyrean
    [category_parent] => 157
)

High Reliability Power Management Chip Simulation and Verification for Automotive Electronics

High Reliability Power Management Chip Simulation and Verification for Automotive Electronics
by Daniel Payne on 10-11-2021 at 10:00 am

Automotive electronics bring strong demand for power management chips, but its strict reliability requirements also pose new challenges for chip designers. The chip needs to be able to work in various harsh environments such as high temperature, low temperature, aging, abnormal power supply, etc. Although the traditional measurement-based method is effective, it has high cost and low efficiency. Multi-scenario high-precision simulation and verification is an inevitable choice that can not only meet the requirements of the testability standards of automotive chips, but also improve design efficiency at a lower cost. For comprehensive functional verification, it will need thousands or even tens of thousands of simulations. The power-on process of some power management chips can be very slow, which can be as high as 80% of the total time.

settling time min

The discontinuity of the high-voltage device model in the power management chip often leads to non-convergence of the simulation. Engineers need to constantly adjust the option combination to make the simulator converge. However, they often encounter situations where they are exhausted and can only rely on the manufacturer’s technical support.

In terms of reliability of a working chip, power-on is not enough to meet the design requirement. We usually need to monitor the complete working process of the chip. For example, when the chip is working, the voltage and current overload or high impedance state of the node will cause unpredictable risks to the chip. The current solution in the industry is to provide a circuit check function. But the drawback of this scheme is that the designer cannot efficiently locate the real problem of the design based on circuit check’s result. The reason is that existing solutions will output a large amount of text data, and designers need to extract effective information from the massive data. Even if the problem of a certain node is found, it is difficult to combine this problem with the circuit.

Corner Switch Technology to accelerate simulation and verification

Empyrean Technology’s analog circuit design environment platform can provide an efficient multi-corner simulation configuration environment through the corner center. Through Corner Switch Technology, it can better deal with convergence problems caused by model and circuit parameter jumps. Using this technology, the chip designer can cut off the simulation, replace the corner, or change the model and circuit parameters after the circuit simulation is powered on, and quickly perform simulation analysis on the power-on state under different PVT conditions. Because the power-on process has little difference under different corner conditions, therefore, we can use normal corner for initial simulation. The state after power-on needs to be closely monitored. Therefore, the more simulation jobs you have, the more you will save in the total simulation time with the help of Corner Switch Technology.

runtime min power management

Circuit Diagnoser to check circuit status

Empyrean Technology’s analog circuit design platform provides  Circuit Diagnoser platform, which can summarize the circuit abnormalities during circuit simulation and display them in an orderly manner. For example, at time A, the gate and source of device M5 have voltage overload; at time B, the current of net8 exceeds the threshold for metal current density. When one wants to find the device M5 or net8 in the circuit, the designer only needs to click the corresponding abnormal result in the Circuit Diagnoser to back-annotate the device and node in the schematic. Combined with Empyrean Technology’s MDE platform and iWave waveform display tool, the designer can perform synchronous functional analysis on the abnormal results, waveforms, and schematic structures of the problem nodes.

iWave waveform min power management

Summary

Automotive electronics is the market with the highest requirements for chip reliability, and power management chips occupy the highest proportion of analog chips. Empyrean Technology’s high-reliability power management chip simulation and verification solution has been verified in the automotive electronics industry. Designers of other types of analog chips with high reliability requirements can also benefit from Corner Switch and Circuit Diagnoser solutions to accelerate the comprehensive simulation and verification of circuit functions.

Related Blogs

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.