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Xilinx
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FPGA Landscape Update 2019

FPGA Landscape Update 2019
by Daniel Nenni on 04-01-2019 at 7:00 am
Categories: Achronix, eFPGA, FPGA, Xilinx
8 Comments

In 2015 Intel acquired Altera for $16.7B changing one of the most heated rivalries (Xilinx vs Altera) the fabless semiconductor ecosystem has ever seen. Prior to the acquisition the FPGA market was fairly evenly split between Xilinx and Altera with Lattice and Actel playing to market niches in the shadows. There were also two FPGA… Read More

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Webinar: ASIC and FPGA Functional Verification Study

Webinar: ASIC and FPGA Functional Verification Study
by Alex Tan on 10-23-2018 at 12:00 pm
Categories: EDA, FPGA, Intel, Siemens EDA, Xilinx

ASIC or FPGA? Each design style has earned designers’ votes depending on the level of urgency, application complexity and funding of their assigned projects. While it is feasible to transition from ASIC to FPGA design or vice versa, such a move is usually done across project refresh instead of midcourse.

Both Xilinx and … Read More

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One Less Reason to Delay that Venture

One Less Reason to Delay that Venture
by Bernard Murphy on 10-11-2018 at 7:00 am
Categories: Arm, FPGA, IP, Xilinx

Many of us dream about the wonderful widget we could build that would revolutionize our homes, parking, health, gaming, factories or whatever domain gets our creative juices surging, but how many of us take it the next step? Even when you’re ready to live on your savings, prototypes can be expensive and royalties add to the pain. … Read More

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FPGA, Data and CASPA: Spring into AI (2 of 2)

FPGA, Data and CASPA: Spring into AI (2 of 2)
by Alex Tan on 03-23-2018 at 12:00 pm
Categories: AI, CASPA, EDA, FPGA, Intel, SiFive, Xilinx

Adding color to the talks, Dr. Jeff Welser, VP and IBM Almaden Research Lab Director showed how AI and recent computing resources could be harnessed to contain data explosion. Unstructured data growth by 2020 would be in the order of 50 Zetta-bytes (with 21 zeros). One example, the Summit supercomputer developed by IBM for use at… Read More

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FPGA, Data and CASPA: Spring into AI

FPGA, Data and CASPA: Spring into AI
by Alex Tan on 03-21-2018 at 12:00 pm
Categories: AI, FPGA, Intel, Xilinx

Just like good ideas percolate longer, we have seen AI adoption pace picking-up speed, propelled by faster GPUs. Some recent data points provide good indication that FPGA making a comeback to bridge chip-design needs to keep-up with AI’s ML applications.

According to the Deloitte research firm there is a projected increase of… Read More

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A Self-Contained Software-Driven Prototype

A Self-Contained Software-Driven Prototype
by Bernard Murphy on 04-26-2017 at 7:00 am
Categories: Aldec, Automotive, EDA, Prototyping, Xilinx

You’re building an IP, subsystem or SoC and you want to use a prototype together with a software testbench to drive extensive validation testing. I’m not talking here about the software running on the IP/SoC processor(s); the testbench should wrap around the whole DUT. This is a very common requirement. The standard approach to… Read More

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Xilinx vs Altera Update 2017

Xilinx vs Altera Update 2017
by Daniel Nenni on 02-15-2017 at 7:00 am
Categories: FPGA, Intel, Xilinx

I truly miss the Xilinx versus Altera war of words (competition at its finest) and competition is what makes the fabless semiconductor ecosystem truly great, absolutely. So with great disappointment I read the Intel Analyst Day transcript published by Bloomberg last week. It is attached at the bottom in case you are interested… Read More

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3 in 1 Hardware Verification

3 in 1 Hardware Verification
by Bernard Murphy on 11-14-2016 at 12:00 pm
Categories: Aldec, EDA, FPGA, Prototyping, Xilinx

Aldec has offered front-end EDA tools for over 30 years but may not be a familiar name to mainstream IC design engineers. That’s probably because for most that period they haven’t really targeted IC design. They have been much more focused on PC-based design for FPGAs particularly where requirements traceability has been important,… Read More

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FPGAs for a few thousand devices more

FPGAs for a few thousand devices more
by Don Dingee on 10-24-2016 at 4:00 pm
Categories: Aldec, Automotive, EDA, FPGA, IoT, Xilinx

An incredibly pervasive trend at last year’s ARM TechCon was the IoT, and I expect this year to bring even more of the same, but with a twist. Where last year was mostly focused on ultra-low power edge devices and the mbed ecosystem, this year is likely to show a better balance of ideas across all three IoT tiers. I also expect a slew of … Read More

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Optimization and verification wins in IoT designs

Optimization and verification wins in IoT designs
by Don Dingee on 08-17-2016 at 4:00 pm
Categories: Aldec, Automotive, EDA, FPGA, IoT, Xilinx

Designers tend to put tons of energy into pre-silicon verification of SoCs, with millions of dollars on the line if a piece of silicon fails due to a design flaw. Are programmable logic designers, particularly those working with an SoC such as the Xilinx Zynq, flirting with danger by not putting enough effort into verification?… Read More