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Resistive RAM (ReRAM) Computing-in-Memory IP Macro for Machine Learning

Resistive RAM (ReRAM) Computing-in-Memory IP Macro for Machine Learning
by Tom Dillinger on 03-18-2021 at 6:00 am

testsite

The term von Neumann bottleneck is used to denote the issue with the efficiency of the architecture that separates computational resources from data memory.   The transfer of data from memory to the CPU contributes substantially to the latency, and dissipates a significant percentage of the overall energy associated with … Read More


All-Digital In-Memory Computing

All-Digital In-Memory Computing
by Tom Dillinger on 03-15-2021 at 6:00 am

NOR gate

Research pursuing in-memory computing architectures is extremely active.  At the recent International Solid State Circuits conference (ISSCC 2021), multiple technical sessions were dedicated to novel memory array technologies to support the computational demand of machine learning algorithms.

The inefficiencies associated… Read More


Register File Design at the 5nm Node

Register File Design at the 5nm Node
by Tom Dillinger on 03-10-2021 at 2:00 pm

lowVt bitcell

“What are the tradeoffs when designing a register file?”  Engineering graduates pursuing a career in microelectronics might expect to be asked this question during a job interview.  (I was.)

On the surface, one might reply, “Well, a register file is just like any other memory array – address inputs, data inputs and outputs, read/writeRead More


TSMC Plans Six Wafer Fabs in Arizona

TSMC Plans Six Wafer Fabs in Arizona
by Scotten Jones on 03-10-2021 at 10:00 am

TSMC Fab 18 Remdering

There are reports in the media that TSMC is now planning six Fabs in Arizona (the image above is Fab 18 in Taiwan). The original post I saw referred to a Megafab and claimed six fabs with 100,000 wafers per month of capacity (wpm) for $35 billion dollars. The report further claimed it would be larger than TSMC fabs in Taiwan.

This report… Read More


A Review of Clock Generation and Distribution for Off-Chip Interfacing

A Review of Clock Generation and Distribution for Off-Chip Interfacing
by Tom Dillinger on 03-09-2021 at 6:00 am

clocking

At the recent ISSCC conference, Mozhgan Mansuri from Intel gave an enlightening (extended) short course presentation on all thing related to clocking, for both wireline and wireless interface design. [1]  The presentation was extremely thorough, ranging from a review of basic clocking principles to unique circuit design … Read More


Chip Channel Check- Semi Shortage Spreading- Beyond autos-Will impact earnings

Chip Channel Check- Semi Shortage Spreading- Beyond autos-Will impact earnings
by Robert Maire on 03-07-2021 at 10:00 am

Robert Maire 2

– Semiconductor shortage is like toilet paper shortage in early Covid
– Panic buying, hoarding, double ordering will cause spike
– Could cause a year+ of dislocation in chip makers before ending
– Investors, Govt & Mgmt will get a wake up call from earnings hit

Auto industry is just a prominent tip Read More


Semiconductor Shortage – No Quick Fix – Years of neglect & financial hills to climb

Semiconductor Shortage – No Quick Fix – Years of neglect & financial hills to climb
by Robert Maire on 03-03-2021 at 8:00 am

Toamagachi Semiconductor shortage

– Semi Situation Stems from long term systemic neglect
– Will require much more than money & time than thought
– Fundamental change is needed to offset the financial bias
– Auto industry is just the hint of a much larger problem

Like recognizing global warming when the water is up to your neck

The problem… Read More


Features of Resistive RAM Compute-in-Memory Macros

Features of Resistive RAM Compute-in-Memory Macros
by Tom Dillinger on 03-02-2021 at 8:00 am

V bitline

Resistive RAM (ReRAM) technology has emerged as an attractive alternative to embedded flash memory storage at advanced nodes.  Indeed, multiple foundries are offering ReRAM IP arrays at 40nm nodes, and below.

ReRAM has very attractive characteristics, with one significant limitation:

  • nonvolatile
  • long retention time
  • extremely
Read More

TSMC ISSCC 2021 Keynote Discussion

TSMC ISSCC 2021 Keynote Discussion
by Daniel Nenni on 03-01-2021 at 6:00 am

Mark Liu TSMC ISSCC 2021

Now that semiconductor conferences are virtual there are better speakers since they can prerecord and we have the extra time to do a better job of coverage. Even when conferences go live again I think they will also be virtual (hybrid) so our in depth coverage will continue.

ISSCC is one of the conferences we covered live since it’s… Read More


A Perfect Storm for GLOBALFOUNDRIES

A Perfect Storm for GLOBALFOUNDRIES
by Daniel Nenni on 02-22-2021 at 6:00 am

Chuck Schumer Globalfoundries Chips

GF has played some groundbreaking roles in the semiconductor ecosystem. The spinout of the AMD fabs and the acquisition of the IBM semiconductor division just to name two. Another big one would be the GF Initial Public Offering which may come as early as 2022.

When the IPO was first mentioned during a chat with GF CEO Tom Caulfield … Read More