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Arm Inches Up the Infrastructure Value Chain

Arm Inches Up the Infrastructure Value Chain
by Bernard Murphy on 08-30-2023 at 6:00 am

Arm just revealed at HotChips their compute subsystems (CSS) direction led by CSS N2. The intent behind CSS is to provide pre-integrated, optimized and validated subsystems to accelerate time to market for infrastructure system builders. Think HPC servers, wireless infrastructure, big edge systems for industry, city, enterprise… Read More


Key MAC Considerations for the Road to 1.6T Ethernet Success

Key MAC Considerations for the Road to 1.6T Ethernet Success
by Kalar Rajendiran on 08-29-2023 at 6:00 am

The World of Ethernet is Gigantic and Growing

Ethernet’s continual adaptation to meet the demands of a data-rich, interconnected world can be credited to the two axes along which its evolution has been propelled. The first axis emphasizes Ethernet’s role in enabling precise and reliable control over interconnected systems. As industries embrace automation… Read More


Bluetooth Based Positioning, More Accurate, More Reliable, Safer

Bluetooth Based Positioning, More Accurate, More Reliable, Safer
by Bernard Murphy on 08-22-2023 at 6:00 am

Using Bluetooth for positioning is a topic I have touched on before, for location services, keyless entry, and asset tracking among other applications. Earlier implementations depended on measures of received signal strength and angle-of-arrival / angle-of-departure, but these have limited accuracy in environments with… Read More


EP177: The Certus Approach to Meeting the Challenges of I/O and ESD with Stephen Fairbanks

EP177: The Certus Approach to Meeting the Challenges of I/O and ESD with Stephen Fairbanks
by Daniel Nenni on 08-18-2023 at 10:00 am

Dan is joined by Stephen Fairbanks, CEO of Certus Semiconductor. Stephen is an ESD pioneer with over 30 years of experience starting with his time at Intel, SRF Technologies, and now Certus Semiconductor.

Stephen describes the varied challenges of ESD andI/O library design presented by today’s technologies and design… Read More


LIVE WEBINAR: Accelerating Compute-Bound Algorithms with Andes Custom Extensions (ACE) and Flex Logix Embedded FPGA Array

LIVE WEBINAR: Accelerating Compute-Bound Algorithms with Andes Custom Extensions (ACE) and Flex Logix Embedded FPGA Array
by Daniel Nenni on 08-16-2023 at 2:00 pm

Andes Flex Webinar

RISC-V have great adoption and momentum. One of the key benefits of RISC-V is the ability for SoC designers to extend its instruction sets to accelerate specific algorithms. Andes’ ACE (Andes Custom Extensions) allow customers to quickly create, prototype, validate and ultimately implement custom memories, dedicated ports… Read More


#60DAC Update from Arteris

#60DAC Update from Arteris
by Daniel Payne on 08-16-2023 at 10:00 am

FlexNoC 5 min

I met up with Andy Nightingale, VP Product Marketing and Michal Siwinski, Chief Marketing Officer of Arteris at #60DAC for an update on their system IP company dealing with SoCs and chiplet-based designs. SemiWiki has been blogging about Arteris since 2011, and the company has grown enough in those 12 years to have an IPO, see their… Read More


Next-Gen AI Engine for Intelligent Vision Applications

Next-Gen AI Engine for Intelligent Vision Applications
by Kalar Rajendiran on 08-14-2023 at 10:00 am

Synopsys ARC MetaWare NN SDK

Artificial Intelligence (AI) has witnessed explosive growth in applications across various industries, ranging from autonomous vehicles and natural language processing to computer vision and robotics. The AI embedded semiconductor market is projected to reach $800 billion by year 2030. Compare this with just $48 billion… Read More


VC Formal Enabled QED Proofs on a RISC-V Core

VC Formal Enabled QED Proofs on a RISC-V Core
by Bernard Murphy on 08-10-2023 at 6:00 am

The Synopsys VC Formal group have a real talent for finding industry speakers to talk on illuminating outside-the-box-topics in formal verification. Not too long ago I covered an Intel talk of this kind. A recent webinar highlighted use of formal methods used together with a cool technique I have covered elsewhere called Quick… Read More


Alphawave Semi Visit at #60DAC

Alphawave Semi Visit at #60DAC
by Daniel Payne on 08-03-2023 at 10:00 am

Alphawavesemi, DAC 2023 3nm eye diagram

On Wednesday at #60DAC I met Sudhir Mallya, Sr. VP Corporate Marketing at Alphawave Semi to get an update about what’s been happening at their IP company and with industry trends. The tagline for their company is: Accelerating the Connected World; and they have IP for connectivity, offer chiplet solutions, and even provide… Read More


Agile Analog Visit at #60DAC

Agile Analog Visit at #60DAC
by Daniel Payne on 07-31-2023 at 10:00 am

agile analog 60dac min

Chris Morrison, Director of Product Marketing at Agile Analog met with me on the Tuesday at DAC this year, and I asked what has changed in the last year for their analog IP business. The short answer is that the company has initially built up foundation IP for Analog Mixed-Signal (AMS) uses, then recently added new IP for data conversion,… Read More