wide 1
WP_Term Object
(
    [term_id] => 178
    [name] => IP
    [slug] => ip
    [term_group] => 0
    [term_taxonomy_id] => 178
    [taxonomy] => category
    [description] => Semiconductor Intellectual Property
    [parent] => 0
    [count] => 1867
    [filter] => raw
    [cat_ID] => 178
    [category_count] => 1867
    [category_description] => Semiconductor Intellectual Property
    [cat_name] => IP
    [category_nicename] => ip
    [category_parent] => 0
    [is_post] => 
)

Analog Design Acceleration for Chiplet Interface IP

Analog Design Acceleration for Chiplet Interface IP
by Tom Simon on 03-24-2022 at 10:00 am

Analog Generators Boost Designer Productivity

Compared to the automation of digital design, the development of automation for analog has taken a much more arduous path. Over the decades there have been many projects both academic and commercial to accelerate and improve the process for analog design. One of the most interesting efforts in this area is being spearheaded by … Read More


Experimenting for Better Floorplans

Experimenting for Better Floorplans
by Bernard Murphy on 03-24-2022 at 6:00 am

Repartitioning min

There is sometimes an irony in switching to a better solution in design construction or analysis. The new approach is so much better that you want to experiment to further optimize the design. Which then exposes another barrier to enjoying that newfound freedom. SoC design teams often find this when switching from crossbar interconnect… Read More


Co-Developing IP and SoC Bring Up Firmware with PSS

Co-Developing IP and SoC Bring Up Firmware with PSS
by Kalar Rajendiran on 03-22-2022 at 10:00 am

Creating a Driver

With ever challenging time to market requirements, co-developing IP and firmware is imperative for all system development projects. But that doesn’t make the task any easier. Depending on the complexity of the system being developed, the task gets tougher. For example, different pieces of IP may be the output of various teams… Read More


Optimizing AI/ML Operations at the Edge

Optimizing AI/ML Operations at the Edge
by Tom Simon on 03-22-2022 at 6:00 am

Optimizing Edge Based AI ML

AI/ML functions are moving to the edge to save power and reduce latency. This enables local processing without the overhead of transmitting large volumes of data over power hungry and slow communication links to servers in the cloud. Of course, the cloud offers high performance and capacity for processing the workloads. Yet, … Read More


Alphawave IP and the Evolution of the ASIC Business

Alphawave IP and the Evolution of the ASIC Business
by Daniel Nenni on 03-21-2022 at 6:00 am

Alphawave IP OpenFive

Alphawave IP has agreed to acquire OpenFive, a SiFive business unit (formerly Open-Silicon) for $210m in cash. Having spent many years in the ASIC business which included working with Open-Silicon, Alphawave, and OpenFive here is my perspective on the acquisition:

This acquisition accomplishes two things: First it trims down… Read More


Leveraging Virtual Platforms to Shift-Left Software Development and System Verification

Leveraging Virtual Platforms to Shift-Left Software Development and System Verification
by Kalar Rajendiran on 03-15-2022 at 6:00 am

Extend Accuracy with Hybrid Platforms

Ever since the cost of development started growing exponentially, engineering teams have been deploying a shift-left strategy to software development and system verification. While this has helped contain cost and accelerated product development schedules, a shift-left strategy is not without challenges. A virtual platform… Read More


Use Existing High Speed Interfaces for Silicon Test

Use Existing High Speed Interfaces for Silicon Test
by Tom Simon on 03-14-2022 at 6:00 am

High Speed Test Access

The growth of complexity for silicon test as it relates to test data volume and test times is driven by multiple concurrent factors. One dimension is simply the increase in silicon complexity. However, other factors are playing a role as well. These include higher reliability requirements for new applications such as automotive,… Read More


Webinar: From Glass Break Models to Person Detection Systems, Deploying Low-Power Edge AI for Smart Home Security

Webinar: From Glass Break Models to Person Detection Systems, Deploying Low-Power Edge AI for Smart Home Security
by Daniel Nenni on 03-13-2022 at 10:00 am

Untitled design

Moving deep learning from the cloud to the edge is the holy grail when it comes to deploying highly accurate, low-power applications. Market demand for edge AI continues to grow globally as new hardware and software solutions are now more readily available, enabling any sized company to easily implement deep learning solutions… Read More


CEO Interview: Frankwell Lin, Chairman and CEO of Andes Technology

CEO Interview: Frankwell Lin, Chairman and CEO of Andes Technology
by Daniel Nenni on 03-11-2022 at 6:00 am

Frankwell Jyh Ming Lin

Frankwell Lin, Chairman of Andes Technology, started his career being as application engineer in United Microelectronics Corporation (UMC) while UMC was an IDM with its own chip products, he experienced engineering, product planning, sales, and marketing jobs with various product lines in UMC. In 1995, after four years working… Read More


Non Volatile Memory IP is Invaluable for PMICs

Non Volatile Memory IP is Invaluable for PMICs
by Tom Simon on 03-07-2022 at 6:00 am

Applications for NVM in PMICs

Power Management ICs are a vitally important part of system design. Evidence of this is cited by a Synopsys white paper that mentions how Apple acquired a portion of PMIC developer Dialog Semiconductor that was previously their exclusive PMIC supplier. Clearly Apple had decided that PMIC design was a strategic differentiating… Read More