Using an IDE to Accelerate Hardware Language Learning

Recently, in one of my regular check-ins with AMIQ EDA, I was pleased that they linked me up with an active customer. The resulting post summarized my discussion with three engineers from Kepler Communications Inc. They talked about using one of the AMIQ EDA products in the design of FPGAs for space-borne Internet connectivity. I told Cristian Amitroaie, CEO and co-founder of AMIQ EDA, that I enjoyed the experience and would be glad to talk to other users any time.

Cristian told me that they work with more than 150 companies in more than 30 countries, and then he mentioned that they also have many users in universities. I really like it when hardware and software vendors provide free or deeply discounted products to educational institutions. It gives students access to advanced technology that their schools cannot afford to buy at commercial prices and provides them with experience highly relevant for employment opportunities when they graduate. This system benefits the vendors as well; if the students like the products they use in college they may wish to buy them and continue using them when they are practicing engineers.

Naturally, I asked Cristian if he could arrange a discussion with one of their educational users. He kindly arranged for me to talk with Dr. Srinivas Boppu, Assistant Professor at Indian Institute of Technology (IIT) Bhubaneswar. The following covers the key points in our conversation.

Thank you for joining me today, Dr. Boppu. Anyone in engineering knows the excellent reputation of IIT. Can you please tell us a bit about the Bhubaneswar campus and your role there?

I’ll be glad to. Bhubaneswar is a city of about a million people and the capitol of the Indian state of Odisha. IIT Bhubaneswar was founded in 2008 during a major expansion of the IIT system, which now has 23 locations. I joined the faculty in 2017 to focus on IC design research and IP development. In addition to teaching classes, I currently have two PhD students, two Master’s students, and seven Bachelor’s students.

How did you get involved with AMIQ EDA?

Starting in 2011, I was a hands-on user while pursuing my PhD at Friedrich-Alexander-University of Erlangen-Nürnberg in Germany. I was writing VHDL while designing processor arrays for accelerating nested loops in computer programs. I had experience with integrated development environments (IDEs) for software and I wondered whether there might be a similar solution for hardware languages such as Verilog and VHDL. I discovered AMIQ EDA and requested an educational license for their Design and Verification Tools (DVT) Eclipse IDE.

How did you like the tool?

I found it really useful. It autocompleted the names of variables and other design elements, generated templates when I was instantiating new constructs in the code, and had great check and debug features. It saved me a lot of time and I remembered that when my students began writing Verilog code for projects at IIT. I started working with AMIQ EDA again, and they provided us all the educational licenses that we requested. I really appreciate that.

What sort of things are your students designing?

Let me start with the undergraduate courses. When we teach our advanced digital system design course, we require our students to complete a non-trivial final project. They write register transfer level (RTL) code for the hardware and develop a simple testbench, all in Verilog. They generally choose to design some sort of processor—Java Virtual Machine, IP block implementing the Google Bfloat16 floating-point spec, MIPS CPU, etc. The students also have to synthesize their design for FPGAs and demonstrate its operation in the lab, so this is indeed a significant project.

How does DVT Eclipse IDE help them?

For most students, this course is their first exposure to Verilog, which is rather different from a programming language such as C/C++ or Java. For example, they often have a hard time understanding blocking versus non-blocking assignments. Because the IDE provides templates and offers menus of options, they don’t have to learn every subtle detail of Verilog syntax and semantics. In a way, the IDE is almost like a coach, guiding them as they write code and nudging them in the correct direction with auto-fix suggestions when they make mistakes. I think that it greatly accelerates learning a new hardware language, and even for us long-time users it continues to have high value.

What about your graduate students? Do they have similar experiences?

Yes, I would say so. They often know Verilog fairly well already, but the designs they create are much larger and more complex. Last year I had a student who designed a vectorized floating-point processor comprising about 10K lines of Verilog code in 90 source files. Another student designed a 10×10 processor array that spanned six FPGA devices. Most of the students in my group use DVT Eclipse IDE for their code development and management. My graduate students typically use the IDE for 9-12 months, whereas students in undergraduate classes use it for only a month or two.

What are the benefits seen by you and your students?

I’ve already mentioned faster learning and faster coding, even for experienced users. We like the way that the IDE manages a whole project, which is especially important for the larger designs. Its incremental compilation and instant checking capabilities improve code quality and correctness, and they help my teaching assistants and me review the student designs. We are able to open the documents and reports at any time.

DVT Eclipse IDE helps users understand code that they didn’t write themselves, and it supports mixed languages. Both of these features are proving vital in a mixed-precision floating-point design, where the graduate student inherited some VHDL IP but is writing new code in Verilog.

How has your experience been working with AMIQ EDA?

They have been tremendously supportive. They’re great to work with and are responsive to suggestions for new features.

Could you give an example of something you wish DVT Eclipse IDE did?

We have some interest in using the Bluespec language because it is higher level than Verilog and is used for some RISC-V projects. We have asked AMIQ EDA to consider adding support and they are looking into it.

What’s next for you and your students?

I don’t expect our hardware design courses to change a lot, but the graduate projects are constantly evolving and growing. We have one design underway that will likely have a million gates. We also have some new PhD work in collaboration with other universities, and a common IDE will help keep the teams in sync.

We plan to try DVT IDE for Visual Studio (VS) Code, which AMIQ announced recently. Many of our students have experience with VS Code for software languages so we expect them to have interest in Verilog support as well. Finally, AMIQ EDA has directed my attention to some diagram generation features that we have not used much, so I plan to check those out soon.

Thank you very much for your time. It is good to know that AMIQ EDA is able to help educate the next generation of hardware engineers.

Thank you as well.

Also read:

AMIQ EDA Adds Support for Visual Studio Code to DVT IDE Family

Automated Documentation of Space-Borne FPGA Designs

Continuous Integration of RISC-V Testbenches