Handling Preprocessed Files in a Hardware IDE

Handling Preprocessed Files in a Hardware IDE
by Daniel Nenni on 02-20-2024 at 10:00 am

Preprocessor 1

For several years now, I’ve been meeting with AMIQ EDA co-founder Cristian Amitroaie every few months to discuss the state of the industry, key trends in design and verification, and the ways that they help facilitate and accelerate chip development. I noticed an interesting new feature mentioned in their latest press releaseRead More


2024 Outlook with Cristian Amitroaie, Founder and CEO of AMIQ EDA

2024 Outlook with Cristian Amitroaie, Founder and CEO of AMIQ EDA
by Daniel Nenni on 02-07-2024 at 10:00 am

AMIQ EDA DVT Eclipse

SemiWki has been working with AMIQ EDA for more than four years now and it has been quite the education. AMIQ EDA is a company that specializes in providing development and verification solutions for digital design and verification teams in the semiconductor industry. They offer a range of products and services aimed at improving… Read More


Using Linting to Write Error-Free Testbench Code

Using Linting to Write Error-Free Testbench Code
by Daniel Nenni on 08-23-2023 at 10:00 am

AMIQ EDA Design and Verification

In my job, I have the privilege to talk to hundreds of interesting companies in many areas of semiconductor development. One of the most fun things for me is interviewing customers—hands-on users—of specific electronic design (EDA) tools and chip technologies. Cristian Amitroaie, CEO of AMIQ EDA, has been very helpful in introducing… Read More


A Hardware IDE for VS Code Fans

A Hardware IDE for VS Code Fans
by Daniel Nenni on 11-22-2022 at 10:00 am

VS Code Remote SSH Article Diagram

A few times a year, I check in with AMIQ EDA co-founder Cristian Amitroaie to see what’s new with their company and the integrated development environment (IDE) market for hardware design and verification. Usually he suggests a topic for us to discuss, but this time I specifically wanted to learn more about the version of their Design… Read More


Using an IDE to Accelerate Hardware Language Learning

Using an IDE to Accelerate Hardware Language Learning
by Daniel Nenni on 06-29-2022 at 10:00 am

Indian Institute of Technology IIT Bhubaneswar

Recently, in one of my regular check-ins with AMIQ EDA, I was pleased that they linked me up with an active customer. The resulting post summarized my discussion with three engineers from Kepler Communications Inc. They talked about using one of the AMIQ EDA products in the design of FPGAs for space-borne Internet connectivity.… Read More


AMIQ EDA Adds Support for Visual Studio Code to DVT IDE Family

AMIQ EDA Adds Support for Visual Studio Code to DVT IDE Family
by Kalar Rajendiran on 03-31-2022 at 10:00 am

FSM of State DVT VSCodium

“A picture is worth a thousand words” is a widely known adage across the world. Recognizing patterns and cycles becomes easier when data is presented pictorially. Naturally, data visualization technology has a long history from the early days, when people used a paper and pencil to graph data, to modern day visualization platforms.… Read More


Automated Documentation of Space-Borne FPGA Designs

Automated Documentation of Space-Borne FPGA Designs
by Daniel Nenni on 02-21-2022 at 10:00 am

Kepler Schem

Over the past three years, I’ve spoken frequently with Cristian Amitroaie, CEO and co-founder of AMIQ EDA, to understand how the company is helping engineers cope with the challenges of chip design and verification. With their broad customer base and many years of experience in the EDA business, the folks at AMIQ really seem to … Read More


Continuous Integration of RISC-V Testbenches

Continuous Integration of RISC-V Testbenches
by Daniel Nenni on 12-02-2021 at 6:00 am

RISC V Results

In my last blog post about AMIQ EDA, I talked with CEO and co-founder Cristian Amitroaie about their support for continuous integration (CI). We discussed in some detail how their Design and Verification Tools (DVT) Eclipse Integrated Development Environment (IDE) and Verissimo SystemVerilog Linter are used in CI flows. Cristian… Read More


Continuous Integration of UVM Testbenches

Continuous Integration of UVM Testbenches
by Daniel Nenni on 09-13-2021 at 6:00 am

UVM Report

In recent years, one of the hot topics in chip design and verification has been continuous integration (CI). Like many innovations in hardware development, it was borrowed from software engineering and the programming world. The concept is simple: all code changes from all developers are merged back into the main development… Read More


What’s New with UVM and UVM Checking?

What’s New with UVM and UVM Checking?
by Daniel Nenni on 06-30-2021 at 6:00 am

UVM and UVM Checking

About once a quarter, I touch base with Cristian Amitroaie, CEO and co-founder of AMIQ EDA, to see what’s new with the company, products, and users. Sometimes he surprises me, as he did earlier this year when he mentioned that their tools check about 150 rules for non-standard constructs in SystemVerilog and VHDL. When we talked … Read More