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WP_Term Object
(
    [term_id] => 178
    [name] => IP
    [slug] => ip
    [term_group] => 0
    [term_taxonomy_id] => 178
    [taxonomy] => category
    [description] => Semiconductor Intellectual Property
    [parent] => 0
    [count] => 1743
    [filter] => raw
    [cat_ID] => 178
    [category_count] => 1743
    [category_description] => Semiconductor Intellectual Property
    [cat_name] => IP
    [category_nicename] => ip
    [category_parent] => 0
    [is_post] => 
)

Economist on ARM vs Intel

Economist on ARM vs Intel
by Paul McLellan on 01-06-2012 at 7:16 pm

The Economist has a big article (may need a subscription, can’t tell because I have one, it’s in the print edition too) about ARM versus Intel. It is an interesting read since I think it misses so much of what really drives semiconductor. It tells the story about Intel trying to get into mobile (because it’s main… Read More


Altera’s New Dual ARM® Cortex™-A9 SoC Arria® and Cyclone® V FPGA Families

Altera’s New Dual ARM® Cortex™-A9 SoC Arria® and Cyclone® V FPGA Families
by Daniel Nenni on 01-03-2012 at 7:29 pm

Altera recently introduced versions of their new Arria® and Cyclone® V FPGA families that incorporates a dual ARM®Cortex™-A9 MPCore hard core. These parts are particularly interesting to NARD as it’s consistent with the NARD concept of offering platforms unified by a common ARM® host core and a variety of controller/coprocessor… Read More


Will Rising Smartphone Tide Lift Semiconductor Boats in 2012?

Will Rising Smartphone Tide Lift Semiconductor Boats in 2012?
by Ed McKernan on 12-16-2011 at 5:12 pm

Memo to Self: When all else fails, return to the Smartphone Market!

The announcement by Intel earlier this week that they would come up short this quarter is a reminder that it is not growth, but very high growth that covers a Multitude of Economic Sins (many which are unforeseen). The semiconductor industry has had to endure three… Read More


IP-SoC 2011 Trip Report: IP again, new ASSP model, security, cache coherence and more

IP-SoC 2011 Trip Report: IP again, new ASSP model, security, cache coherence and more
by Eric Esteve on 12-13-2011 at 9:05 am

For the 20[SUP]th[/SUP] anniversary of IP-SoC, we had about ten presentations, most being really interesting; the conference has provided globally a very good level of information, speakers coming from various places like China, Belarus, The University of Aizu (Japan), University of Sao Paulo (Brazil), Silesian and Warsaw… Read More


Intel Proves Last Year’s Conventional Wisdom Wrong

Intel Proves Last Year’s Conventional Wisdom Wrong
by Ed McKernan on 12-11-2011 at 7:00 pm

Back in the 1990’s, Richard Branson, the legendary Entrepreneur and investor was asked how to become a millionaire, and he allegedly responded, “There’s really nothing to it. Start as a billionaire and then buy an airline.” I think the same principle can be applied to a large part of the Semiconductor… Read More


Microsoft’s New Tablet Strategy: Here, There and Everywhere

Microsoft’s New Tablet Strategy: Here, There and Everywhere
by Ed McKernan on 12-03-2011 at 10:33 am

As mentioned in a previous post, Microsoft has started to come clean on its software strategy as it relates to Windows 8 for PCs and Tablets. The strategy has been changing quite rapidly since their first admission in September. Essentially the Windows 8 O/S will be forked based on whether the mobile device is operating on an x86 or… Read More


100 USB 3.0 IP Design-In…Is PLDA rocketing SuperSpeed USB technology?

100 USB 3.0 IP Design-In…Is PLDA rocketing SuperSpeed USB technology?
by Eric Esteve on 11-29-2011 at 10:19 am

Did we (the analyst) completely underestimate SuperSpeed USB take-off, or is the company tweaking the meaning of “USB 3.0 IP Design-In”? This PRfrom PLDA could be understood as a claiming from the IP vendor that they have achieved the 100[SUP]th[/SUP] design win for their USB 3.0 IP… Let’s try to understand how PLDA can make more… Read More


How to use NoC to avoid routing congestion

How to use NoC to avoid routing congestion
by Eric Esteve on 11-23-2011 at 5:21 am

Network-on-Chip (NoC) is an emerging paradigm for communications within large VLSI systems implemented on a single silicon chip. Sgroi et al. call “the layered-stack approach to the design of the on-chip intercore communications the Network-on-Chip (NOC) methodology.” In a NoC system, modules such as processorRead More


Media Tablet & Smartphones to generate $6 Billion market in… power management IC segment by 2012, says IPnest

Media Tablet & Smartphones to generate $6 Billion market in… power management IC segment by 2012, says IPnest
by Eric Esteve on 11-15-2011 at 10:59 am

With worldwide annual media tablet shipments forecast changing –growing- almost every quarter, the latest from ABI research calling for shipment to approach 100 million units in 2012 and passing 150 million in 2014, with the same kind of forecast for smartphone passing 400 million units this year (438 million) and approaching… Read More


Synopsys Awarded TSMC’s Interface IP Partner of the Year

Synopsys Awarded TSMC’s Interface IP Partner of the Year
by Eric Esteve on 11-09-2011 at 9:19 am

Is it surprising to see that Synopsys has been selected Interface IP partner of the year by TSMC? Not really, as the company is the clear leader on this IP market segment (which includes USB, PCI Express, SATA, DDRn, HDMI, MIPI and others protocols like Ethernet, DisplayPort, Hyper Transport, Infiniband, Serial RapidIO…). But,… Read More