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I Love DAC

I Love DAC
by Paul McLellan on 04-13-2012 at 1:16 pm

Image RemovedFor the fourth year Atrenta, Cadence and Springsoft are jointly sponsoring the “I LOVE DAC” campaign. In case you have been hibernating all winter, DAC is June 3-7th in San Francisco at the Moscone Center.

There are two parts to “I LOVE DAC”. First, if you register by May 15th (and they haven’t… Read More


EDPS: 3D ICs, part II

EDPS: 3D ICs, part II
by Paul McLellan on 04-12-2012 at 10:00 pm

Image RemovedPart I is here.

In the panel session at EDPS on 3D IC a number of major issues got highlighted (highlit?).

The first is the problem of known-good-die (KDG) which is what killed off the promising multi-chip-module approach, perhaps the earliest type of interposer. The KDG problem is that with a single die in a package … Read More


EDPS: 3D ICs, part I

EDPS: 3D ICs, part I
by Paul McLellan on 04-10-2012 at 10:00 pm

The second day (more like a half-day) of EDPS was devoted to 3D ICs. There was a lot of information, too much to summarize in a few hundred words. The keynote was by Riko Radojcic of Qualcomm, who has been a sort of one-man-band attempting to drive the EDA and manufacturing industries towards 3D. Of course it helps if you don’t … Read More


EDPS: SoC FPGAs

EDPS: SoC FPGAs
by Paul McLellan on 04-09-2012 at 4:00 am

Image RemovedMike Hutton of Altera spends most of his time thinking about a couple of process generations out. So a lot of what he worries about is not so much the fine-grained architecture of what they put on silicon, but rather how the user is going to get their system implemented. 2014 is predicted to be the year in which over half … Read More


EDPS: Parallel EDA

EDPS: Parallel EDA
by Paul McLellan on 04-08-2012 at 10:00 pm

Image RemovedEDPS was last Thursday and Friday in Monterey. I think that this is a conference that more people would benefit from attending. Unlike some other conferences, it is almost entirely focused around user problems rather than doing a deep dive into things of limited interest. Most of the presentations are more like survey… Read More


DAC Pavilion Panels

DAC Pavilion Panels
by Paul McLellan on 04-05-2012 at 12:00 am

Image RemovedOnce again DAC has a full program of panel sessions that take place on the exhibit floor at the DAC pavilion, aka booth 310.

Gary Smith kicks off the program with his annual “What’s Hot at DAC” presentation on Monday, June 4th, from 9:15-10:15am. The rest of Monday’s pavilion panels are:

  • “Low power to the people,” a panel
Read More

DAC 2012 Technical Program Highlights

DAC 2012 Technical Program Highlights
by Daniel Nenni on 04-01-2012 at 11:00 pm

Image RemovedThe technical program for DAC 2012 has an exceptional quality of technical papers, panels, special sessions, WACI (Wild and Crazy Ideas), WIP (Work In Progress), full day tutorials and user-track. The program is tailored for researchers and developers focused on electronic design automation (EDA) and embedded… Read More


EDPS Monterey

EDPS Monterey
by Paul McLellan on 03-17-2012 at 8:00 am

Image RemovedEvery year in Monterey is a relatively small conference that looks at the design process, EDPS, the electronic design process symposium. I gave a keynote there a couple of years ago, but you don’t have to listen to me this time. The keynotes are from:

  • 1st day: Misha Buric, CTO of Altera, talking about SoC FPGAs
Read More

My Design Automation and Test in Europe Conference Agenda (DATE 2012)

My Design Automation and Test in Europe Conference Agenda (DATE 2012)
by Daniel Nenni on 03-11-2012 at 7:00 pm

Image Removed
As this blog is being posted I’m on my way to Dresden for the 2012 Design Automation and Test Conference. DATE used to bounce between Munich and Paris, I have attended many times but not in the past couple of years. No excuse really, just busy with other things.
DATE 2012 Highlights in Dresden include E-Mobility and More-than-Moore… Read More