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Synopsys Earnings Call

Synopsys Earnings Call
by Paul McLellan on 05-27-2015 at 12:00 am

Synopsys had their earnings announcement and call last week. They were good. In Aart’s own words:I’m happy to report that our second quarter results were very strong and solidify our outlook for the full year. We delivered revenue of $557 million, non-GAAP earnings per share of $0.68 and $155 million in operation cash flow.Read More


Saving Time and Money on Your Next SoC Project

Saving Time and Money on Your Next SoC Project
by Daniel Payne on 05-12-2015 at 8:00 pm

Every SoC project that I know of wants to finish on time, under budget, and maximize profits per device. When I first started out doing DRAM design I learned that we could maximize profit by doing shrinks of existing designs, move from ceramic to plastic packages, and reduce the amount of time spent on a tester. Today, the economic … Read More


SoC’s Shift Left Needs Software Integrity

SoC’s Shift Left Needs Software Integrity
by Pawan Fangaria on 05-05-2015 at 3:00 pm

Since Aart de Geus, co-CEO and co-founder of Synopsys, gave his keynote at the Synopsys User Group (SNUG) conference in Silicon Valley last March, I’ve been hearing a lot more about the “Shift Left” in semiconductor design. Although I couldn’t attend Synopsys’ 25[SUP]th[/SUP]SNUG, I found some short videos on the Synopsys website… Read More


TCAD Enables Moore’s Law to Continue

TCAD Enables Moore’s Law to Continue
by Daniel Payne on 05-03-2015 at 7:00 am

We live in very interesting times, you can wear an Android watch from Samsung that uses 14 nm FinFET technology, attend the 52nd DAC conference in June to learn about EDA and IP vendors supporting FinFET, and read about research work for new devices down to 5 nm. TCAD is that critical software technology that enables the development… Read More


25 Years of SNUG; 50 Years of Moore’s Law

25 Years of SNUG; 50 Years of Moore’s Law
by Paul McLellan on 03-26-2015 at 8:00 am

Earlier this week it was the Synopsys user group meeting SNUG. Not just any old SNUG but the 25th Annual SNUG. The first one was 15th March 1991 and was attended by 100 people. At the time, Synopsys had annual revenues of $22M. This year, the various SNUGs around the world will have a total attendance of 10,000 people and Synopsys revenue… Read More


Innovative MIPI Display Solution for UHD Mobile Devices

Innovative MIPI Display Solution for UHD Mobile Devices
by Pawan Fangaria on 03-25-2015 at 7:00 pm

Today an SoC cannot be without multiple IP blocks integrated together in the most optimal manner. In such an environment, it’s natural that interoperability and configurability of an IP get prime considerations to achieve the best PPA (Power, Performance and Area) for the SoC containing that IP. While PPA is a basic criterion … Read More


Wow: Synopsys v. Mentor Update!

Wow: Synopsys v. Mentor Update!
by Daniel Nenni on 03-22-2015 at 7:00 am

As a reminder, the Synopsys v. Mentor drama started when Synopsys filed a Complaint for Declaratory and Injunctive Relief on the same day (September 27, 2012) as they entered into an agreement to acquire emulation provider EVE (ZeBu emulator systems), which competes with Mentor’s Veloce family of emulators. Apparently, upon… Read More


Shifting Chip Design Left!

Shifting Chip Design Left!
by Daniel Nenni on 03-15-2015 at 7:00 am

In the traditional sense “Shift Left” is the process of making things simpler in an effort to make things faster. Shift Left was the theme of theDVCon keynote last week delivered by Synopsys co-founder and co-CEO Aart de Geus which is right on topic when it comes to modern semiconductor design and manufacturing, absolutely.

KEYNOTE:Read More


FinFET Design Enablement

FinFET Design Enablement
by Daniel Payne on 03-10-2015 at 1:00 pm

We read about FinFET technology in the semiconductor press daily now, thanks to Intel introducing their TriGate transistors starting in 2011 and creating a race with foundries and IDMs to switch from planar CMOS nodes. To get some perspective about the progress of FinFET IP and EDA tools I spoke with two experts from Synopsys, Swami… Read More


Faster ECOs Using Formal Analysis

Faster ECOs Using Formal Analysis
by Daniel Payne on 02-28-2015 at 7:00 am

Your latest SoC has just begun the tape-out process and then marketing comes back with a small update to the specification to make your design more competitive, or maybe your regression tests just found a minor bug in a single IP block that needs to be fixed. Should you go back in your design flow, change the RTL source code and then completely… Read More