When you’re designing a hardware solution to plug into what is arguably the most complex system of all – the Internet – you can’t get away with a little fake traffic to test whether your box is going to do all the right things at the right performance. You have to model realistic voice, video, data and wireless traffic in… Read More
Semiconductor Merger Mania Explained!
Next week is the Mentor U2U Conference in Silicon Valley. By chance I had coffee with one of the U2U keynote speakers while we were waiting for the FD-SOI Symposium to start last week and can tell you this FREE event is one you don’t want to miss:… Read More
PCB Design Requires Both Speed and Accuracy of SI/PI Analysis
The prevailing industry trends are clear: (1) PCB and die package designs are becoming more complex, across both mobile and high-performance applications; (2) communication interface performance between chips (and their related protocols) is increasingly demanding to verify; (3) signal integrity and power integrity issues… Read More
Bridging Design Environments for Advanced Multi-Die Package Verification
This year is shaping up to be an inflection point, when multi-die packaging technology will experience tremendous market growth. Advanced 2.5D/3D package offerings have been available for several years, utilizing a variety of technologies to serve as the package substrate, interposer material for embedding die micro-bump… Read More
Mentor Extends Verification Offering!
With verification consuming more and more of the design cycle and the increasingly complex industry standard interfaces that are now common place, Verification IP (VIP) is again a trending topic. Back in my IP days the age old question was: Is it better to use VIP from the IP vendor? Because you know it will work, right? Or is it better… Read More
Mentor at DVCon – Visualize This
Steve Bailey entertained us during lunch on Tuesday with a talk on debug and visualization in the Mentor platform. Steve is based in Colorado, so had to spend the first part of his talk gloating about their Super Bowl win, but I guess he deserves that.
On a more technical note, he showed us a familiar survey they had completed with the… Read More
Dr. Walden Rhines on the Past Present and Future!
Who can present seventy six slides in sixty minutes, still have time for questions, AND make it interesting? Dr. Walden Rhines that’s who. Here is a link to the presentation but I have to warn you, it is a 100MB PDF file:
Design Verification Challenges: Past, Present, and Future
The DVCon conference was well attended again this year… Read More
HW Emulator Apps Open Doors to Entirely New Uses
When the topic of hardware emulation comes up, thoughts of big iron customarily come to mind. However, hardware emulation has evolved significantly and now there are other important traits that distinguish the offerings in this area. For a very long period of time emulators provided primarily a method to accelerate gate level… Read More
Design Verification Challenges: Past, Present and Future!
Next week I will be at DVCON which is not to be confused with DEFCON the community of black and white hat hackers that challenge our online privacy on a daily basis. DVCON is the premier conference for the functional design and verification of our beloved electronic devices. The big draw next week of course is the keynote by Dr. Walden… Read More
Mentor ARM subscription signals ecosystem shift
Since creating the landmark “all-you-can-eat” license with Samsung in 2002, ARM has inked several subscription deals with chipmakers and EDA firms. The latest ARM subscriber license deal just announced is for Mentor Graphics. What makes their strategy unique?… Read More