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Achieving a Predictable SignOff in 7nm

Achieving a Predictable SignOff in 7nm
by Alex Tan on 05-14-2019 at 12:00 pm

Designing with advanced-nodes FinFETs such as 7nm node involves a more complex process than prior nodes. As secondary physical effects are no longer negligible, the traditional margin-based approach applied at various design abstraction levels is considered ineffective. Coupled with the increase of device counts, failing… Read More


Re Energizing Silicon Innovation

Re Energizing Silicon Innovation
by Bernard Murphy on 05-13-2019 at 12:00 pm

Hardware is roaring back into prominence in technology innovation, from advanced cars to robots, smart homes and smart cities, 5G communication and the burgeoning electronification of industry, medicine and utilities. While software continues to play a role, all of these capabilities depend fundamentally on advances in … Read More


Anirudh Keynote at CDNLive 2019

Anirudh Keynote at CDNLive 2019
by Bernard Murphy on 05-08-2019 at 7:00 am

Anirudh Devgan (President of Cadence), gave the third keynote at CDNLive Silicon Valley this year. He has clearly become adept in this role. He has a big, but supportable vision for Cadence across markets and technologies and he’s become a master of the annual tech reveals that I usually associate with keynotes.


Anirudh opened … Read More


Webinar: ISO 26262 Compliance

Webinar: ISO 26262 Compliance
by Daniel Payne on 05-02-2019 at 12:00 pm

To me the major idea of ISO 26262 compliance is ensuring that requirements can be traced throughout the entire design and verification process, including the use of IP blocks. The first market application that comes to mind with ISO 26262 is automotive, with its emphasis on safety because human lives are at stake. Since necessity… Read More


Complex Validation Requires Scalable Measures

Complex Validation Requires Scalable Measures
by Alex Tan on 05-01-2019 at 12:00 pm

The famous Olympic motto Citius, Altius, Fortius, which is the Latin words for “Faster, Higher, Stronger” to a considerable degree can be adapted to our electronics industry. Traditionally the fundamental metrics we used for measuring the quality of results (QoRs) are performance, power, and area (PPA). Amidst… Read More


Free Webinar: Analog Verification with Monte Carlo, PVT Corners and Worst-Case Analysis

Free Webinar: Analog Verification with Monte Carlo, PVT Corners and Worst-Case Analysis
by Tom Simon on 04-29-2019 at 4:00 pm

The letters “PVT” roll of the tongue easily enough, belying the complexity that variations in process, temperature and voltage can cause for analog designs. For semiconductor processes, there are dozens of parameters that can affect the viability of a design. It would be easy enough to optimize a circuit with only one or two varying… Read More


A Brief History of Methodics

A Brief History of Methodics
by Daniel Nenni on 04-29-2019 at 12:00 pm

Methodics has been a key player in IP management for over 10 years. In this section, Methodics shares their history, technology, and their role in developing IP Lifecycle Management (IPLM) solutions for the electronics industry.

Methodics is recognized as a premier provider of IP Lifecycle Management (IPLM) and traceability… Read More


EDA Update 2019

EDA Update 2019
by Daniel Nenni on 04-26-2019 at 12:00 pm

Over the last six years EDA has experienced yet another disruption not unlike the Synopsys acquisition of Avant! in 2001 which positioned Synopsys for the EDA lead they still enjoy today. Or the hiring of famed venture capitalist Lip-Bu Tan in 2009 to be the CEO of struggling EDA pioneer Cadence Design Systems. Under Lip-Bu’s… Read More


Deep Learning, Reshaping the Industry or Holding to the Status Quo

Deep Learning, Reshaping the Industry or Holding to the Status Quo
by Daniel Payne on 04-25-2019 at 12:00 pm

AI, Machine Learning, Deep Learning and neural networks are all hot industry topics in 2019, but you probably want to know if these concepts are changing how we actually design or verify an SoC. To answer that question what better place to get an answer than from a panel of industry experts who recently gathered at DVcon with moderator… Read More


A Brief History of IP Management

A Brief History of IP Management
by Daniel Nenni on 04-24-2019 at 12:00 pm

As RTL design started to increase in the late 1980’s and early 1990’s, it was becoming apparent that some amount of management was needed to keep track of all the design files and their associated versions. Because of the parallels to software development, design teams looked to the tools and methodologies that were in use by software… Read More