At advanced nodes such as 7 and 5nm, timing closure and sign off are becoming much more difficult than before at 16nm. One area of chips that has increased in complexity dramatically and who’s correct operation is essential for silicon success is the clock tree. If the clock tree has excessive jitter, it will throw off every timing… Read More
Electronic Design Automation
How Hyperscalers Are Changing the Ethernet Landscape
It’s all about bandwidth these days – fueling hyperscale data centers that support high-performance and cloud computing applications. It’s what enables you to stream a movie on your smart TV while your roommate plays an online game with friends located in different parts of the country. It’s what makes big data analytics run swiftly… Read More
You Get What You Measure – How to Design Impossible SoCs with Perforce
We all know that a trusted, reliable, and well-integrated design flow is critical to successful advanced SoC design. So is proven, robust IP. While these elements are necessary for success, they are not, by themselves, sufficient. There are other aspects to consider – measurement, tracking and coordination. We’ve all heard … Read More
S2C FPGA Prototyping solutions help accelerate 3D visual AI chip
3D vision technology is rapidly evolving. Compared to 2D vision technology that deals with planar information, 3D vision works with physical information, including depth, which makes it possible to recognize and measure objects with curved surfaces and arcs. In addition, as deep machine learning and big data computing technologies… Read More
Synopsys’ Complete 800G Ethernet Solutions
If I ask the question, “What has grown 4,000x over the last twenty-five years?”, most people will start throwing names of some stocks. Although various stock markets have had crazy run ups and yes, there is a stock that has grown 2,500x over that period of time, the answer to the 4,000x question is not a stock. What if I modify the question… Read More
Debugging Embedded Software on Veloce
Arm provides great support for debugging embedded software in its CoreSight tools, but what support do you have if you’re debugging hardware and software together in a pre-implementation design? In a hardware debugger you have lots of support for hardware views like waveforms and register states. But these aren’t well connected… Read More
The Quest for Bugs: “Shift-Left, Right?”
Shift-left, why?
Shift-left testing is an approach to software and system testing which is performed earlier in the lifecycle (that is, moved left on the project timeline). It is the first half of the “Test early and often” maxim that was coined by Larry Smith in 2001.
It’s now an established idea, much talked about … Read More
On-the-Fly Code Checking Catches Bugs Earlier
There’s no question that chip designs are getting more complex, driven by the power, performance, and area (PPA) demands of applications like artificial intelligence (AI), automotive, and cloud computing. This complexity, of course, trickles down to the design and testbench code. When engineers can find and fix bugs before… Read More
Executable Specifications Shorten Embedded System Development
Even though AI is being used to replace procedural coding for many embedded applications, there is still, and will be for a long time, code that is written manually to deal with complicated inputs to control connected systems. Even in AI based systems there are programmer coded steps for responses to AI identified inputs. All of … Read More
Extreme Optics Innovation with Ansys SPEOS, Powered by NVIDIA GPUs
Optical engineers rely on Ansys SPEOS to deliver extreme product innovation — and NVIDIA dramatically accelerates the development cycle
Product autonomy, artificial intelligence, the Internet of Things (IoT) and other challenging trends are placing new demands on optical engineers in the automotive, aerospace and general… Read More


The Quantum Threat: Why Industrial Control Systems Must Be Ready and How PQShield Is Leading the Defense