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AI

Artificial Intelligence

Podcast EP324: How Dassault Systèmes is Creating the Next Generation of Semiconductor Design and Manufacturing with John Maculley

Podcast EP324: How Dassault Systèmes is Creating the Next Generation of Semiconductor Design and Manufacturing with John Maculley
by Daniel Nenni on 12-26-2025 at 10:00 am
Categories: 3D IC, AI

Daniel is joined by John Maculley, Global High-Tech Industry Strategy Consultant at Dassault Systèmes. John has over 20 years of experience advancing innovation across the semiconductor and electronics sectors. Based in Silicon Valley, he works with leading foundries, OSATs, design houses, and research institutes worldwide… Read More

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Assertion-First Hardware Design and Formal Verification Services

Assertion-First Hardware Design and Formal Verification Services
by Kalar Rajendiran on 12-25-2025 at 6:00 am
Categories: AI, EDA, LUBIS EDA

LUBIS EDA Modelling

Generative AI has transformed software development, enabling entire applications to be built in minutes. But despite similar progress in AI-generated RTL, hardware verification remains a major bottleneck. RTL can be produced quickly, yet proving its correctness is extraordinarily difficult. This has revived a long-standing… Read More

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PDF Solutions’ AI-Driven Collaboration & Smarter Decisions

PDF Solutions’ AI-Driven Collaboration & Smarter Decisions
by Kalar Rajendiran on 12-23-2025 at 10:00 am
Categories: AI, EDA, PDF Solutions, Semiconductor

11 Commandments of AI Application Adoption

When most people hear the term PDF, they immediately think of a PDF file, a universal, platform-independent way to share electronic documents.

There is, however, another PDF that many outside the semiconductor industry may not be familiar with. And this PDF actually predates the PDF file format. It is short for PDF Solutions, … Read More

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CEO Interview with Gopi Sirineni of Axiado

CEO Interview with Gopi Sirineni of Axiado
by Daniel Nenni on 12-21-2025 at 12:00 pm
Categories: AI, CEO Interviews

Gopi Sirineni Axiado

Gopi Sirineni is a Silicon Valley veteran with four startups and over 25 years of experience in the semiconductor, software and systems industries. As a senior executive, he has demonstrated exceptional skills in building highly efficient, cost-effective organizations, managing them in rapidly changing environments, and… Read More

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Reimagining Architectural Exploration in the Age of AI

Reimagining Architectural Exploration in the Age of AI
by Bernard Murphy on 12-17-2025 at 6:00 am
Categories: AI, EDA, Rise Design Automation

Rise and Precision flow

This is not about architecting a full SoC from scratch. You already have a competitive platform, now you want to add some kind of accelerator, maybe video, audio, ML, and need to explore architectural options for how accelerator and software should be partitioned, and to optimize PPA. Now we have AI to help us optimize you’d like … Read More

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WEBINAR: Why Network-on-Chip (NoC) Has Become the Cornerstone of AI-Optimized SoCs

WEBINAR: Why Network-on-Chip (NoC) Has Become the Cornerstone of AI-Optimized SoCs
by Admin on 12-15-2025 at 8:00 am
Categories: AI, Arteris, Events, IP

AION Silicon Arteris Webinar

By Andy Nightingale, VP of Product Management and Marketing

As AI adoption accelerates across markets, including automotive ADAS, large-scale compute, multimedia, and edge intelligence, the foundations of system-on-chip (SoC) designs are being pushed harder than ever. Modern AI engines generate tightly coordinated, … Read More

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Superhuman AI for Design Verification, Delivered at Scale

Superhuman AI for Design Verification, Delivered at Scale
by Mike Gianfagna on 12-11-2025 at 10:00 am
Categories: AI, Bronco AI, EDA

Superhuman AI for Design Verification, Delivered at Scale

There is a new breed of EDA emerging. Until recently, EDA tools were focused on building better chips, faster and with superior quality of results. Part of that process is verifying and debugging the resultant design. Thanks to ubiquitous AI workloads and multi-chip architectures, the data to be verified and debugged is exploding,… Read More

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AI Deployment Trends Outside Electronic Design

AI Deployment Trends Outside Electronic Design
by Bernard Murphy on 12-11-2025 at 6:00 am
Categories: AI

Balancing quality with speed

In a field as white-hot as AI it can be difficult to separate cheerleading from reality. I am as enthusiastic as others about the potential but not the “AI everywhere in everything” message that some emphasize. So it was interesting to find a survey which looks at the deployment reality outside our narrow domain of electronic and … Read More

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AI-Driven DRC Productivity Optimization: Insights from Siemens EDA’s 2025 TSMC OIP Presentation

AI-Driven DRC Productivity Optimization: Insights from Siemens EDA’s 2025 TSMC OIP Presentation
by Daniel Nenni on 12-09-2025 at 10:00 am
Categories: AI, EDA, Events, Siemens EDA, TSMC

AI Driven DRC Productivity Optimization Siemens AMD TSMC

 

In the rapidly evolving semiconductor industry, Design Rule Checking (DRC) remains a critical bottleneck in chip design workflows. Siemens EDA’s presentation at the 2025 TSMC Open Innovation Platform Forum, titled “AI-Driven DRC Productivity Optimization,” showcases how artificial intelligence … Read More

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How PCIe Multistream Architecture Enables AI Connectivity at 64 GT/s and 128 GT/s

How PCIe Multistream Architecture Enables AI Connectivity at 64 GT/s and 128 GT/s
by Kalar Rajendiran on 12-09-2025 at 8:00 am
Categories: AI, EDA, IP, Synopsys

Link Utilization Graph

As AI and HPC systems scale to thousands of CPUs, GPUs, and accelerators, interconnect performance increasingly determines end-to-end efficiency. Training and inference pipelines rely on low-latency coordination, high-bandwidth memory transfers, and rapid communication across heterogeneous devices. With model sizes… Read More