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Smoothing the Path to NoC Adoption

Smoothing the Path to NoC Adoption
by Bernard Murphy on 08-31-2021 at 6:00 am

Arteris customers min 1

We’re creatures of habit. As technologists, we want to move fast and break things, but only on our terms. Everything else should remain the same or improve with minimum disruption. No fair breaking the way we do our jobs as we plot a path to greatness. This is irrational, of course. Real progress often demands essential changes where… Read More


S2C FPGA Prototyping solutions help accelerate 3D visual AI chip

S2C FPGA Prototyping solutions help accelerate 3D visual AI chip
by Daniel Nenni on 08-16-2021 at 6:00 am

aivatech product 1

3D vision technology is rapidly evolving. Compared to 2D vision technology that deals with planar information, 3D vision works with physical information, including depth, which makes it possible to recognize and measure objects with curved surfaces and arcs. In addition, as deep machine learning and big data computing technologies… Read More


AI Acceleration: Autonomous is Driving

AI Acceleration: Autonomous is Driving
by Manouchehr Rafie on 08-12-2021 at 6:00 am

Figure 5 1

Large numbers of sensors, massive amounts of data, ever-increasing computing power, real-time operation and security concerns required for autonomous vehicles are driving the core of computation from the cloud to the edge of the network. Autonomous vehicles are constantly sensing and sending data on road conditions, location… Read More


Optimize RTL and Software with Fast Power Verification Results for Billion-Gate Designs

Optimize RTL and Software with Fast Power Verification Results for Billion-Gate Designs
by Johannes Stahl on 07-28-2021 at 10:00 am

ZeBu Empower diagram

In every chip, power is a progressive problem to be solved. Designers have long had to rely on a combination of experience and knowledge to tackle this dilemma, typically having to wait until after silicon availability to perform power analysis with realistic software workloads. However, this is too late in the game, as it becomes… Read More


Instrumenting Post-Silicon Validation. Innovation in Verification

Instrumenting Post-Silicon Validation. Innovation in Verification
by Bernard Murphy on 07-28-2021 at 6:00 am

Instrumenting Post-Silicon Validation

Instrumenting post-silicon validation is not a new idea but here’s a twist. Using (pre-silicon) emulation to choose debug observation structures to instrument in-silicon. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research… Read More


The Quest for Bugs: “Correct by Design!”

The Quest for Bugs: “Correct by Design!”
by Bryan Dickman on 07-04-2021 at 6:00 am

Title Image

In this article we take an objective view of Virtual Prototyping from the engineering lens and the “quest to find bugs”. In this instance we discuss the avoidance of bugs in terms of architecting complex ASICs to be “correct by design”.

AI Challenges

It is not surprising to find out that other areas of human endeavour, beyond semiconductor… Read More


Neural Nets and CR Testing. Innovation in Verification

Neural Nets and CR Testing. Innovation in Verification
by Bernard Murphy on 06-29-2021 at 10:00 am

Instrumenting Post-Silicon Validation

Leveraging neural nets and CR testing isn’t as simple as we first thought. But is that the last word in combining these two techniques? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO) and I continue our series on research ideas. As always, feedback welcome.… Read More


Data Orchestration Hardware Unlocks the Full Potential of AI

Data Orchestration Hardware Unlocks the Full Potential of AI
by Mike Gianfagna on 06-10-2021 at 10:00 am

Data Orchestration Hardware Unlocks the Full Potential of AI

We all know that artificial intelligence (AI) and machine learning (ML) are fundamentally changing the world. From the smart devices that gather data to the hyperscale data centers that analyze it, the impact of AI/ML can be felt almost everywhere. It is also well-known that hardware accelerators have opened the door to real-time… Read More


Architecture Wrinkles in Automotive AI: Unique Needs

Architecture Wrinkles in Automotive AI: Unique Needs
by Bernard Murphy on 05-20-2021 at 6:00 am

Baidu versus Mobileye min

Arteris IP recently spoke at the Spring Linley Processor Conference on April 21, 2021 about Automotive systems-on-chip (SoCs) architecture with artificial intelligence (AI)/machine learning (ML) and Functional Safety. Stefano Lorenzini presented a nice contrast between auto AI SoCs and those designed for datacenters.… Read More


Cadence Extends Tensilica Vision, AI Product Line

Cadence Extends Tensilica Vision, AI Product Line
by Bernard Murphy on 05-11-2021 at 6:00 am

Tensilica vision min

Vision pipelines, from image signal processing (ISP) through AI processing and fancy effects (super-resolution, Bokeh and others) has become fundamental to almost every aspect of the modern world. In automotive safety, robotics, drones, mobile applications and AR/VR, what we now consider essential we couldn’t do without… Read More